Mitsubishi Electric Q13UDVCPU - Page 475

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APPENDICES
A
Appendix 2 List of Special Relay Areas
SM720
Comment read
completion flag
OFF: Comment read
not completed
ON: Comment read
completed
This relay turns on only during first scan
after the processing of the COMRD or
PRC instruction is completed.
S (Status
change)
New
Qn(H)
QnPH
This relay turns on only during first scan
after the processing of the COMRD
instruction is completed.
QnPRH
QnU
LCPU
SM721
File being
accessed
OFF: File not accessed
ON: File being
accessed
This relay is on while a file is being
accessed by the SP.FWRITE,
SP.FREAD, COMRD, PRC, or LEDC
instruction.
S (Status
change)
New
Qn(H)
QnPH
This relay is on while a file is being
accessed by the SP.FWRITE,
SP.FREAD, COMRD, or LEDC
instruction.
Qn(H)
QnPH
QnPRH
This relay is on while a file is being
accessed by the SP.FWRITE,
SP.FREAD, COMRD, or SP.DEVST
instruction.
QnU
• This relay is on while a file is being
accessed by the SP.FWRITE,
SP.FREAD, COMRD, or SP.DEVST
instruction.
• This relay is on while the standard
ROM is being accessed.
• This relay is on while the
S(P).SFCSCOMR or
S(P).SFCTCOMR instruction is being
executed.
QnUDV
• This relay is on while a file is being
accessed by the SP.FWRITE,
SP.FREAD, COMRD, or SP.DEVST
instruction.
• This relay is on while a SD memory
card or the standard ROM is being
accessed.
• This relay is on while the
S(P).SFCSCOMR or
S(P).SFCTCOMR instruction is being
executed.
LCPU
This relay is on while an ATA card or the
standard ROM is being accessed.
QnU
*4
This relay is on while the
S(P).SFCSCOMR or S(P).SFCTCOMR
instruction is being executed.
QnU
*11
This relay is on while the SP.FTPPUT or
SP.FTPGET instruction is being
executed.
LCPU
*17
SM722
BIN/DBIN
instruction error
disabling flag
OFF: Error detection
performed
ON: Error detection
not performed
Turned ON when "OPERATION ERROR"
is suppressed for BIN or DBIN
instruction.
UNew
QCPU
LCPU
SM734
XCALL instruction
execution condition
designation
OFF: Not executed by
execution
condition risen
ON: Executed by
execution
condition risen
• During OFF, XCALL instructions will
not be executed even if execution
condition is risen.
• During ON, XCALL instructions will be
executed when execution condition is
risen.
UNew
Qn(H)
*4
Number Name Meaning Explanation
Set by
(When Set)
Corresponding
ACPU
M9
Corresponding
CPU