Mitsubishi Electric Q13UDVCPU - Page 588

586
*1 The "power supply 1" indicates the redundant power supply module mounted on the POWER 1 slot of the redundant
base unit (Q38RB/68RB/Q65WRB).
*2 The "power supply 2" indicates the redundant power supply module mounted on the POWER 2 slot of the redundant
base unit (Q38RB/68RB/Q65WRB).
*3 Modules whose serial number (first five digits) is "07032" or later. In a multiple CPU system, the serial number (first five
digits) of all the CPU modules must be "07032" or later.
*4 Modules whose serial number (first five digits) is "10042" or later
(24)CC-Link IE Field Network Basic function
SD1782
Momentary
power failure
detection
counter for
power supply
1
*1
Momentary
power failure
detection
count for
power supply
1
• This register counts the number of times of momentary
power failure of the power supply 1/2.
• This register monitors the status of the power supply 1/2
mounted on the redundant power main base unit (Q38RB)
and counts the number of momentary power failures. The
status of the power supply 1/2 mounted on the extension
base unit for redundant power supply system and the
redundant type extension base unit is not monitored.
• When the CPU module starts, the counter of the power
supply 1/ 2 is cleared to 0.
• If the input power to one of the redundant power supply
modules is turned off, the corresponding counter is cleared
to "0".
• The counter is incremented by one upon momentary
power failure on the power supply 1 or 2. (The counter
repeats increment and decrement of the value; 0  32767
 -32768  0. (The value is displayed within the range of
0 to 65535 in the system monitor screen of programming
tool.))
• When the main base unit is not the redundant power main
base unit (Q38RB), "0" is stored.
• In a multiple CPU system, the status is stored only to CPU
module No.1.
S (Every
END
processing)
New
Qn(H)
*3
QnPH
*3
QnPRH
QnU
*4
SD1783
Momentary
power failure
detection
counter for
power supply
2
*2
Momentary
power failure
detection
count for
power supply
2
Number Name Meaning Explanation
Set by
(When Set)
Corresponding
ACPU
D9
Corresponding
CPU
SD1700
Cyclic
transmission
status of
each station
Cyclic
transmission
status of each
station
The cyclic transmission status of each station is stored in the
following bit pattern. (Off: Not performed, On: Being
performed)
■QnUDV
■LCPU
The numbers in the figure indicate station numbers.
(Condition)
• Only the bit of the start station number turns on.
• The status is not stored for the reserved stations and the
station numbers after the maximum station number.
Use this register as an interlock for cyclic transmission. For
details on the interlock program, refer to the following.
CC-Link IE Field Network Basic Reference Manual
S (Every
END
processing)
New
QnUDV
*1
LCPU
*2
Number Name Meaning Explanation
Set by
(When Set)
Corresponding
ACPU
D9
Corresponding
CPU
16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
87654321
b15 ... b7b8 b6 b5 b4 b3 b2 b1 b0