Mitsubishi A2CCPU - Page 42

4. A2CcPU /MELSEC-A
(3) operation processing
signal. The status
of the outputs (Y) and the data memory
are retained.
(b) In them] state, the processing illustrated in Fig. 4.10
to
IZJ or f-1
is re eated until the o eration state is changed from
PAUSE
I/O modules refreshed
4
CPU error check
+
Operation state check
I
I
I I
I
Fig. 4.10 [PAUSE] Operation Processing
To set the PC CPU in the pause state, use one of the following methods:
a) Remote
v] contact
b) Peripheral device
For details, refer to
4.2.4.
L
d
e
c-
Y
1
J
4