Motorola Commercial CM Series - MODEL CHART AND TECHNICAL SPECIFICATIONS; THEORY OF OPERATION

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Table of Contents
Chapter 1 MODEL CHART AND TECHNICAL SPECIFICATIONS
1.0 CM140/CM340/CM160/CM360 Model Chart .......................................................1-1
2.0 Technical Specifications ......................................................................................1-2
Chapter 2 THEORY OF OPERATION
1.0 Introduction ..........................................................................................................2-1
2.0 UHF (403-440MHz) Receiver ..............................................................................2-1
2.1 Receiver Front-End ........................................................................................2-1
2.2 Receiver Back End.........................................................................................2-2
3.0 UHF Transmitter Power Amplifier (403-440 MHz) ...............................................2-2
3.1 First Power Controller Stage ..........................................................................2-2
3.2 Power Controlled Driver Stage.......................................................................2-3
3.3 Final Stage .....................................................................................................2-3
3.4 Directional Coupler .........................................................................................2-3
3.5 Antenna Switch...............................................................................................2-3
3.6 Harmonic Filter ...............................................................................................2-4
3.7 Power Control.................................................................................................2-4
4.0 UHF (403-440MHz) Frequency Synthesis...........................................................2-4
4.1 Reference Oscillator.......................................................................................2-4
4.2 Fractional-N Synthesizer ................................................................................2-5
4.3 Voltage Controlled Oscillator (VCO)...............................................................2-6
4.4 Synthesizer Operation....................................................................................2-7
5.0 Controller Theory of Operation ............................................................................2-8
5.1 Radio Power Distribution ................................................................................2-8
5.2 Protection Devices........................................................................................2-10
5.3 Automatic On/Off..........................................................................................2-10
5.4 Microprocessor Clock Synthesiser ...............................................................2-11
5.5 Serial Peripheral Interface (SPI)...................................................................2-12
5.6 SBEP Serial Interface...................................................................................2-12
5.7 General Purpose Input/Output......................................................................2-12
5.8 Normal Microprocessor Operation................................................................2-13
5.9 Static Random Access Memory (SRAM)......................................................2-14
6.0 Control Board Audio and Signalling Circuits......................................................2-14
6.1 Audio Signalling Filter IC and Compander (ASFIC CMP) ............................2-14
7.0 Transmit Audio Circuits......................................................................................2-15
7.1 Microphone Input Path .................................................................................2-15
7.2 PTT Sensing and TX Audio Processing .......................................................2-16
8.0 Transmit Signalling Circuits ...............................................................................2-17
8.1 Sub-Audio Data (PL/DPL) ............................................................................2-17
8.2 High Speed Data ..........................................................................................2-18