NXP Semiconductors KW45B41Z-EVK - Page 21

NXP Semiconductors
KW45B41Z-EVKUM
KW45B41Z-EVK Board User Manual
USB HOST
POWER
5V CAN
FL_USB_5V0
P5V_CAN
P5V
D10
PMEG4010CP A
2
1
3
mcu core supply
I
OD
I
i
Program mable Output Voltage Regulation:
===============================
1. SW 1: Core Buck, 0.5V~1.5V Output, 25mV/ste p, up to 250mA
2. SW 2: Syste m Buck, 1.5V~2.1V/2.7V~3.3V Output, 25m V/s tep, up to 500m A
3. LDO1: Always-ON LDO, 1.70V~1.90V Output, 25mV/step, up to 1mA
4. LDO2: Sys tem LDO, 1.5V~2.1V/2.7V~3.3V Output, 25mV/s tep, up to 250mA
1.1V default
O
Default
SW1 = 1.1V for core supply (P1V1_EXT)
SW2 = 1.8V for P1V8 board (P1V8_EXT)
LDO1 = NC
LDO2 = 3.3V for P3V3 board (P3V3_SEL)
PMIC, read 0xc3, write 0xc2
3. 3V de f au l t
1. 8V de f au l t
I2C1_SCL
I2C1_SDA
INT_B_PMIC
NMI_b/ADC0_B5
ADC0_A6/PMIC_SYSRST
PMIC_SW1
PMIC_S W2
PMIC_LDO2
P3V3_LDO
PMIC_S W2 P1V8_EXT
PMIC_S W1 P1V1_EXT
GND
GND
GND GND GND
GND
GND GND
GND
GND
GND
GND
GND
GND
GND
P5V
P5V
VBOARD
PTC0
PTC1
PTD3
PTD1
PTD2
JP2
HDR 1X2
1 2
L5 2.2uH
1 2
TP5
JP3
HDR 1X2
1 2
R7
100K
R10 100K
DNP
R169 0
DNP
C24
0.1UF
16V
C20
10uF
10V
C27
2.2UF
10V
TP3
C29
2.2UF
10V
R12 100K
R167 0
DNP
C16
2.2uF
16V
R15 0
DNP
C23
22uF
10V
D6
RB160M-30
A
C
C19
10uF
10V
R6
100K
C17
0.47uF
16V
C26
1.0UF
10V
R9 2.2K
DNP
C32
10uF
16V
JP1
HDR 1X2
1
2
U2
PCA9420UK
VIN
C1
PSYS1
A2
VBAT_BKUP
D2
SCL
D5
SDA
E5
MODESEL0
E4
MODESEL1
E3
SYSRST
D3
ON
C4
INT
D4
VBAT
A1
TS
C2
AGND1
B3
PGND1
A4
LDO1_OUT
E1
LDO2_OUT
D1
LX2
B5
SW2_OUT
B4
LX1
A3
SW1_OUT
B2
PGND2
A5
PSYS2
C5
AGND2
C3
AGND3
E2
ASYS
B1
R14
0
TP6
TP4
R3 0
R11 100K
DNP
L4 2.2uH
1 2
C25
1.0UF
10V
C21
0.1UF
16V
C28
4.7UF
10V
+
C33
10UF
R5 0
DNP
C22
10uF
10V
R168 0
DNP
U3 NCP1117ST33T3G
GND
1
VOUT
2
VIN
3
TAB
4
R13 100K
TP7
R4 0
R8 2.2K
DNP
PMIC_LDO1
PMIC_MODESEL1
PMIC_MODESEL0
INT_B
ON_B
PMIC_VBAT_BCKUP
PMIC_MODESEL1
PMIC_MODESEL0
PMIC_SCL
PMIC_VBAT
PMIC_SDA
PMIC_SYSRST_B
PMIC_PSYS
LX1
LX2
PMIC_LDO1
V_LDO_OUT
PMIC_VIN
PMIC_SCL
PMIC_SDA
INT_B
ON_B
LiIon / Ext Battery
PMIC_SYSRST_B
Figure 8. Power supply circuit diagram 2
VOUT_SWI TCH MCU_VDDs
(VDD_IO_D)
(t o DCDC_LX ind uc to r)
i
If the boa rd is in its default powe r configura tio n, only J P10
is ne eded to s witch be tween DCDC and Bypas s m ode s
6.3V
VDD_S YS = 1 .7 1V -2. 75 V
VDD_SWI TCH
VOUT_S WITCH
1V8_DCDC
VDD_DCDC VDD_IO_ABC VDD_ANA
VDD_LDO_CORE
VDD_PA_2G4
VDD_CORE
VDD_SWITCH
VOUT_S YS/VDD_SYS
VBAT
PMIC_LDO2
GND GND
VDD_REG
P1V8_EXT
GND
GND
VDD_DCDC
GND
P1V8_EXT
GND GND
GND
GND
GND
P1V1_EXT
MCU_VDD_REGMCU_VDD_REG
MCU_VDD_REG
MCU_VDD_REG
GND GND
P1V8_EXT
VDD_DCDC
P3V3_LDO
VBOARD
VBOARD
P3V3
MCU_VDD_REG
P3V3
JP10
HDR 2X3
VDD_SEC
1 2 3 4
65
JP41
HDR 1X2
VBOARD
1
2
JP37
HDR TH 1X3
1 2
3
C43
0.1UF
C39
0.1UF
R177
10
C34
0.1UF
C36
0.1UF
JP7
HDR TH 1X3
VDD_DCDC
1
2
3
C41
0.1UF
C42
4.7uF
0603
JP11
HDR 1X2
VDD_PA_2P 4_EXT
1
2
JP15
HDR 1X2
VDD_CORE_EXT
1
2
JP40
HDR 1X2
DNP
LDO_SYS_BYPASS
1 2
JP12
HDR 1X2
1
2
JP13
HDR 1X2
DNP
VDD_SYS
1 2
JP9
HDR TH 1X3
VDD_ANA
1
2
3
JP8
HDR TH 1X3
VDD_IO_ABC
1
2
3
JP5
HDR 2X3
PWR SELECTION
1 2
3 4
65
C38
10uF
C46
4.7uF
0603
JP4
HDR TH 1X3
VDD_SWITCH
1
2 3
C44
4.7uF
0603
L13
1800 OHM
1
2
JP6
HDR TH 1X3
1
2 3
C35
4.7uF
DNP
C37
0.1UF
DNP
C45
10uF
DNP
R178
3.3
C47
1.5uF
0603 (1608 Metric)
6.3V
C40
4.7uF
0603
VDD_SWITCH
V_SEC
DNP
VDD_REG
VDD_RF
GND GND
JP14
HDR 1X2
VDD_RF
1 2
R179
3.3
C48
12pF
C49
22uF
6.3V
Figure 9. Power supply circuit diagram 3
Note: For coincell battery powered devices, a series resistor is needed for VDD_RF supply from pin 2 of
jumper JP14 to limit current peaks. For more information, see E-4: VDD_RF supply does not have a series
resistor.
Table 8 describes the KW45B41Z-EVK power supplies.
KW45B41Z-EVKUM All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.
User manual Rev. 2 — 13 February 2023
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