NXP Semiconductors KW45B41Z-EVK - CAN Interface

NXP Semiconductors
KW45B41Z-EVKUM
KW45B41Z-EVK Board User Manual
By default, the Y1 crystal provides a 32 MHz clock to the target MCU. Alternatively, Y3 TCXO (not populated on
the board) can be used to provide a 32 MHz clock to the target MCU.
Figure 12 shows the circuit diagram of the Y1 crystal that provides 32 MHz clock. Internal load capacitors
provide the crystal load capacitance, and they can be adjusted to tune the center frequency of the crystal. To
measure the 32 MHz crystal frequency, program the XTAL (XTAL_RF) signal to provide buffered output clock
signal.
GND
XTAL_RF
EXTAL_RF
Y1
32MHz
NX1612SA 32MHZ EXS00A CS14160
32M
1
4
3
2
R40 0
XTAL_32M
EXTAL_32M
Figure 12. 32 MHz clock circuit diagram
Figure 13 shows the circuit diagram of the Y2 crystal that provides 32.768 kHz clock. Internal load capacitors
provide the crystal load capacitance. 0 Ω resistors are provided to bypass the Y2 crystal which gives two
additional GPIOs, PTD4 and PTD5, to the I/O headers.
GND
GND
PTD4_XTAL32K
PTD5_EXTAL32K
R1300
C54
12pF
DNP
Y2
32.768 kHz
32K
NX2012SE 32.768kHz EXS00A-MU01517
1
2
R131
0
C55
12pF
DNP
XTAL32K
EXTAL32K
Figure 13. 32.768 kHz clock circuit diagram
2.3 CAN interface
The target MCU has a FlexCAN module (CAN0), which supports controller area network (CAN) and CAN
flexible data rate (FD). The KW45B41Z-EVK board allows communication with CAN0 module through a high-
speed CAN transceiver, which drives CAN signals between CAN0 module and a physical two-wire CAN bus that
terminates at a 1x4 pin header.
Figure 14 shows the KW45B41Z-EVK CAN diagram.
KW45B41Z
Two voltage
translators
CAN transceiver
CAN header J10
Arduino socket
DL connector
J1
CAN0
Figure 14. CAN diagram
Table 12 explains the KW45B41Z-EVK CAN connections.
KW45B41Z-EVKUM All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.
User manual Rev. 2 — 13 February 2023
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