NXP Semiconductors
KW45B41Z-EVKUM
KW45B41Z-EVK Board User Manual
Figure 19 the circuit diagram of the QSPI NOR flash memory.
LPSPI1_PCS0/TPM1_CH0
LPSPI1_PCS2/INT_COMBO
LPSPI1_PCS3
C50
0.1UF
R20 0
TP11
SCK
SO SI
Figure 19. QSPI NOR flash memory circuit diagram
The above circuit diagram is explained below:
• The QSPI NOR flash memory (U4) is powered from the VDD_MEM supply, which is derived from the
VBOARD supply through jumper JS1
• By default, JS1 is not populated but its pin 1 and pin 2 positions are connected through a physical (trace)
connection on the secondary (bottom) side of the PCB. Therefore, QSPI NOR flash memory is connected to
power, by default.
• When populated, JS1 can be used to enable/disable the VDD_MEM supply. If populating the jumper to allow
manual connection/disconnection, cut the trace connection between its pin 1 and pin 2 positions.
• Current drawn by U4 can be measured via JS1 through an ammeter
• Discrete pullup resistors are provided for SPI signals
• The SPI signals can be shared with other peripherals through Arduino socket DH connector J2
2.6 LPI2C interface
The target MCU (KW45B41Z) has two Low-Power Inter-Integrated Circuit (LPI2C) modules: LPI2C0 and
LPI2C1. The KW45B41Z-EVK board only supports LPI2C1 module. Figure 20 shows the KW45B41Z-EVK
LPI2C diagram.
MCU-Link
Voltage
translator
Arduino socket
DH connector J2
PMIC
Accelerometer
mikroBUS socket
connector J13
Figure 20. LPI2C diagram
Table 15 shows the KW45B41Z-EVK LPI2C bus device map.
KW45B41Z-EVKUM All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved.
User manual Rev. 2 — 13 February 2023
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