Omron SYSMAC CP2E-N D Series User Manual

4-27
4 Understanding Programming
CP2E CPU Unit Software User’s Manual(W614)
4-6 Index Registers
4
4-6-2 Using Index Registers
• Instructions for Direct Addressing of Index Registers:
BINARY ADD (+L), BINARY SUBTRACT (−L), DOUBLE INCREMENT BINARY (++L),
DOUBLE DECREMENT BINARY (−−L)
The example given above shows how an Index Register in a program loop can replace a long series of
instructions. In this case, instruction A is repeated n+1 times to perform some operation such as read-
ing and comparing a table of values.
Precautions for Correct UsePrecautions for Correct Use
The following instructions are executed even when the input conditions are OFF. Therefore,
when indirect memory addresses are specified using auto-incrementing or auto-decrementing
(,IR+ or ,IR-) in an operand of any of these instructions, the value in the Index Register (IR) is
refreshed each cycle regardless of the input condition (increases or decreases one every cycle).
This must be considered when writing a program.
The following ladder programming examples show how the index registers are treated.
Example 1
Ladder Program:
LD P_Off
OUT, IR0+
Operation: When the PLC memory address CIO 0.13 is stored in IR0.
The input condition is OFF (P_Off is the Always OFF Flag), so the OUT instruction sets CIO 0.13,
which is indirectly addressed by IR0, to OFF. The OUT instruction is executed, so IR0 is incre-
mented. As a result, the PLC memory address CIO 0.14, which was incremented by +1 in the
IR0, is stored. Therefore, in the following cycle the OUT instruction turns OFF CIO 0.14.
Example 2
Ladder Program:
LD P_Off
SET, IR0+
Operation: When the PLC memory address CIO 0.13 is stored in IR0.
Classification Instructions
Sequence input instructions LD, LD NOT, AND, AND NOT, OR, OR NOT, LD TST, LD TSTN, AND
TST, AND TSTN, OR TST, OR TSTN
Sequence output instructions OUT, OUT NOT, DIFU, DIFD
Sequence control instructions JMP, FOR
Timer and counter instructions TIM/TIMX(550), TIMH(015)/TIMHX(551), TMHH(540)/TMHHX(552),
TTIM(087)/TTIMX(555), TIML(542)/TIMLX(553),
MTIM(533)/MTIMX(554), CNT/CNTX(546),
CNTR(012)/CNTRX(548)
Comparison instructions Symbol comparison instructions (LD, AND, OR =, etc.)
Single-precision floating-point
math instructions
Single-precision floating-point data comparison (LD, AND, OR = F,
etc.)
Instruction A m
Instruction A m+1
Instruction A m+n
MOVR(560) m IR0
Instruction A ,IR0+
Stores the PLC memory
address of m in IR0.
Repeats the process
in a loop such as
FOR-NEXT.
Example:

Omron SYSMAC CP2E-N D Series Specifications

General

Brand	Omron
Model	SYSMAC CP2E-N D Series
Category	Computer Hardware
Language	English