Onkyo CR-185 - Page 9

CR-185
[no. |syMBoL |yo[pescrrrion ss CC™—~—~—~CSCSC*dS_NO._ | SyMBO_| YO DESCRIPTION
1
Irok
|
1
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SS
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sO
|
[DAOS
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|
2
[rsw
|
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[Output
filter
changeover
output
for
spindle
motor
||
43
|DAO7
|
O
[DAG7
_—IRFCKoupu.
3
[MON
|
[Spindle
motor
control
ouput
Cid
|
44
AOS
|
©
[DADS
—*[C2POoupu
Cd
4
|Mpp
|
0
[Spindle
motor
servoconrol
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|
45
—IDAOS
|
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[DAOS
—|XRAOFoupu
Ts
Imps
|
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[Spindle
motor
servocomrot
Ss
|
46
(DADS
«|
[DAOA
—|MNTSoutp
|
6
|tock
|
O
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«|
|
47
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|
[DAO3
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[7
Inc
|
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a
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fc
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|
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circuit
output
for
analog
EFM
PLL.
[49
|Daor
|
O
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ike i eeereet ie eter [50_[APTR | © |Controt output for aperture correction. H when R ch._|
(8.6436MHz
[51
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|
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output
for
aperture
correction.
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when
L
ch._|
to
frest
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vss
|
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SC
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33.8688MHz
input.
risisinc.
|
|
—™—SC~C~CS
84
Fx
[0
[crystal
oscillation
circuit
output
of
16.9344MH2.
|
|
46
|VPCO
_|
O
[PLU
charge
pump
output
for
variable
pitch
eal
cee
Go
selection
input
terminal.
L
when
16.9344MHz.
ee
ae
Clock
input
for
variable
pitch
from
VCO
H
when
33.8688MHz.
16.934MHz [36 _[estr___| © 2/3 divided ouputof pins 53 and54.
Yas
[ro
|
©
|FikerourputformasterPLL.
Sd
|_S7_
CAM
To
[4.2336MHzoup
19
Temi
1
1
[rimer
input
for
master
PLL.
SSSS~s«_
88
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[0
fi6.9344MHzoupm
=
|
20
Ipco
_|_©
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pump
output
of
master
PLL
1
~s9
[mp2
sr
|
Digital
oui
pat
contro!
input.
On
at
high
level.
|
21
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|__|
Analog
ground
60
_|pout
|
©
[Digiatoupn
.
2
{erty
__|_1
[vcO
contol
voltage
input
for
master
[61
|EMPH
|
O
[Emphasis
conwol
ouput.
Active
high,
|
|
23,
[AVDD
|__|
Analog
section
power
supply
(+5
|
62_|weck
|
0
|Writeframeclock
outpt
ee
ale
aaa
95
|BIAS
|
1
{A
mmety
circuit
constant
current
input
or
SI.
|
9%
lasyr
|
1
[a
mmetry
comp
or
voltage
input
|
64_|sBSO_|
©
|Serial
ourputof
subcode(P~W)
T_27
lasyo
|
O
\EFMfullswingouput
|
65
|EXCK
|
1
|Ctock
inputforreadouSQso.
Pte
ecm
[Foes
ae
ree
el
ee
eee
output.
Pee
Audio
data
output
mode
changeover
input
|
_67_|sgcx
|
1
|ClockinputforreadoutSQsO_
Serial
data
at
L
and
paraller
data
at
H.
[68
[MUTE
|
©
[Mutingconwrol
ouput.
ActiveH.
Par
[wack
__|_1
JD/A
interface
for
48
bits
slot.
Word
clock
f=2Fs.
|
|_69
[SENS
|
[Sens
ourput.
Output
to
the
microprocessor
|
Y
32
|URCK
|
_1
[D/A
imestace
for
48
bits
slot.
LR
clock
f=Fs._|
70
_|xRsT
__|
1
|System
reset.
Resetatthelow
level.
T~33
Ivpp
___|__frower
supply
terminal
(+5V)
«|
|_71
[DATA
|
_1
[Serial
data
input
from
the
microprocessor.
|
as
Dal
al
=n
YT
|S
C=*d:SsédP
sum
[pssu-o
Latch
the
serial
data
at
the
wailing.
|
34
[pais
_|
O
|DAt6
[73
|vpp
|
[Powersupply
remind
[35
(DAIS
|
O
DAIS
_[Bitclockof
48
bits
slor__|
|
74
[cox
|
1
|Serial
data
transfer
clock
input
from
microprocessor_|
|
36
[DAis
|
O
|DA14
__|Serial
data
of
64
bits
slot_|
[75
[sein
|
1
|SensinputfromSsP_
DAI3
TO
|DAI3
_[Bitclock
of
68
bits
slot__|
CNCI
1
[Track
jump
numbers
count
signal
input_
|
|
38
|DAI2
|
O
|DAI2
_
LR
clock
of
68
bits
slon__
|
77_[DATO
|
0
|SerialdataoupmoSSP_
[39
{pai
|
O
[DAN
—(GTOPowpur
[78
|xtTO
|
©
[Serial
data
latch
output
to
SSP.
Latch
at
wailing.
_|
[4
|paio
|
Oo
|DaAio
—|xUGFoupu
[79
[ctKo
|
0
|Serial
datawansferclock
ouput
to
SSP.
|
41
|DAo9
|o
[paog
_|XPLCK
output
[80
_[MIRR
|
1
[Mirorsignalinpr
Note: SSP: 1C101 CXA1372Q