IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-4
Q201 : D707E001RFP250 (32 bit Floating-Point Digital Signal Processor)-4/5
TERMINAL DESCRIPTION
TX-SR505/505E
McASP0, McASP1, McASP2, and SPI1 Serial Ports
AHCLKR0/AHCLKR1 143 IO
ACLKR0 139 IO
AFSR0 141 IO
AHCLKX0/AHCLKX2 2 IO
ACLKX0 142 IO
AFSX0 144 IO
AMUTE0 3 O
AXR0[0] 113 IO
AXR0[1] 115 IO McASP0 Serial Data 1
AXR0[2] 116 IO McASP0 Serial Data 2
AXR0[3] 117 IO McASP0 Serial Data 3
AXR0[4] 119 IO McASP0 Serial Data 4
AXR0[5]/SPI1_SCS 120 IO McASP0 Serial Data 5 or SPI1 Slave Chip Select
AXR0[6]/SPI1_ENA 121 IO McASP0 Serial Data 6 or SPI1 Enable (Ready)
AXR0[7]/SPI1_CLK 122 IO McASP0 Serial Data 7 or SPI1 Serial Clock
AXR0[8]/AXR1[5]/
SPI1_SOMI
McASP0 Serial Data 8 or McASP1 Serial Data 5 or
SPI1 Data Pin Slave Out Master In
126 IO
AXR0[9]/AXR1[4]/
SPI1_SIMO
McASP0 Serial Data 9 or McASP1 Serial Data 4 or
SPI1 Data Pin Slave In Master Out
127 IO
AXR0[10]/AXR1[3] 130 IO McASP0 Serial Data 10 or McASP1 Serial Data 3
AXR0[11]/AXR1[2] 131 IO McASP0 Serial Data 11 or McASP1 Serial Data 2
AXR0[12]/AXR1[1] 134 IO McASP0 Serial Data 12 or McASP1 Serial Data 1
AXR0[13]/AXR1[0] 135 IO McASP0 Serial Data 13 or McASP1 Serial Data 0
AXR0[14]/AXR2[1] 137 IO McASP0 Serial Data 14 or McASP2 Serial Data 1
AXR0[15]/AXR2[0] 138 IO McASP0 Serial Data 15 or McASP2 Serial Data 0
ACLKR1 9 IO McASP1 Receive Bit Clock
AFSR1 12 IO McASP1 Receive Frame Sync (L/R Clock)
AHCLKX1 5 IO McASP1 Transmit Master Clock
ACLKX1 7 IO McASP1 Transmit Bit Clock
AFSX1 11 IO McASP1 Transmit Frame Sync (L/R Clock)
AMUTE1 4 O McASP1 MUTE Output
SPI0_SOMI/I2C0_SDA 111 IO
SPI0_SIMO 110 IO
SPI0_CLK/I2C0_SCL 108 IO
SPI0_SCS/I2C1_SCL
107 IO
SPI0_ENA/I2C1_SDA
105 IO
SPI0, I2C0, and I2C1 Serial Port Pins
McASP0 and McASP1 Receive Master Clock
McASP0 Receive Bit Clock
McASP0 Receive Frame Sync (L/R Clock)
McASP0 and McASP2 Transmit Master Clock
McASP0 Transmit Bit Clock
SPI0 Enable (Ready) or I2C1 Serial Data
SPI0 Slave Chip Selector I2C1 Serial Clock
SPI0 Serial Clock or I2C0 Serial Clock
SPI0 Data Pin Slave In Master Out
SPI0 Data Pin Slave Out Master In or I2C0 Serial Data
McASP0 Transmit Frame Sync (L/R Clock)
McASP0 MUTE Output
McASP0 Serial Data 0
TYPE
SIGNAL NAME PIN NO. DESCRIPTION