Panasonic NV-DS30A - CCD Drive Block Diagram

1
8
13
4
10
12
11
3
2
1
CCD
IMAGE
SENSOR
IC601 (CCD)
PIN
7
PIN
8
FP301
8
PIN
9
FP301
9
PIN
4
FP301
4
PIN
6
FP301
7
FP301
6
PIN
2
FP301
2
PIN
3
FP301
3
PIN
1
FP301
1
LEVEL
CHANGE
LEVEL
CHANGE
LEVEL
CHANGE
LEVEL
CHANGE
LEVEL
CHANGE
LEVEL
CHANGE
LEVEL
CHANGE
DRIVE
R302 NOT USED
(WITH DSC)
R301
DRIVE
5
7
8
9
14
13
12
10
19
30
38
39
16
20
21
15
22
23
30
27
31
3
17
18
1
IC302 (CCD V-DRIVE)
IC301 (TIMING SIGNAL GENERATOR)
IC501 (CAMERA SIGNAL PROCESS)
Q601
BUFFER
CCD C.B.A.
MAIN C.B.A.
V1 PULSE
SAMPLING PULSE 1
SAMPLING PULSE 2
CHARGE PULSE 1
V2 PULSE
V3 PULSE
CHARGE PULSE 2
V4 PULSE
SUB CONTROL PULSE
H1 PULSE
H2 PULSE
RESET PULSE
46
45
47
10
11
41
40
35
9
OB CLAMP PULSE
DUMMY CLAMP PULSE
PRE BLANKING PULSE
MUX
VGA
DOUBLE
SAMPLING
HOLD
10BIT
A/D CONVERTER
D/A CONVERTER
REC VIDEO(CAMERA) SIGNAL
23192122 46 47 48 20 16
12
3
4
FCK
TG CS (L)
TG SERIAL DATA
TG SERIAL CLOCK
6MHz CLOCK
18MHz CLOCK
A/D CLOCK 1
VD
HD
CLAMP
CLAMP
CAMERA DATA (0-9)
CAMERA DAC SERIAL CLOCK
CAMERA DAC SERIAL DATA
CAMERA DAC CS (L)
FCK (18MHz)
CAM HD
CAM VD
82FCK
X301
36MHz
OSC
TO/FROM VIDEO SIGNAL PROCESS I
BLOCK DIAGRAM
FROM SYSTEM CONTROL
BLOCK DIAGRAM
FROM VIDEO SIGNAL PROCESS I
BLOCK DIAGRAM
6MHz CLOCK
TG SERIAL CLOCK
TG SERIAL DATA
TG CS (L)
(FROM IC6001(103))
VSUB CONTROL
(FROM IC3001(230))
STILL CONTROL
18MHz CLOCK
R306
R320
R321
FP301
11
PIN
11
NOT USED
CAMERA DATA (10 BIT)
3
12
Q301
NOT USED
CCD DRIVE BLOCK DIAGRAM
CCD DRIVE BLOCK DIAGRAM
NV-DS29EG/NV-DS29EGM/NV-DS29B/NV-DS29EGE/NV-DS30EG/NV-DS30EGM/NV-DS30B/NV-DS30EGE/NV-DS30EN/NV-DS30ENT/NV-DS30ENC/NV-DS30A/NV-DS50EN/NV-DS50ENT/NV-DS50A