Panasonic SA-XR55P - Page 53

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SCHEMATIC DIAGRAM - 2
DSP CIRCUIT
:MAIN SIGNAL LINE: +B SIGNAL LINE
VREF
IC1009
C1BB00000672
MULTI-BIT AUDIO A/D CONVERTER
AGND2
VCOMR
AINR+
AINR-
VCC
OVFL
OVFR
/RST
SYSCK
LRCK
AGND
BCLK
SDATA
VREF AGND1 VCOML AINL+ AINL- FMT1 M/S OSR0 OSR1 OSR2 BYPASS FMT0 DGND VDD
C1059
1
C1061
0.1
C1063
0.01
AINC-
AINC+
R1072
33
R1074
33
C1058
1
C1060
0.1
C1062
0.01
D1001
B0ACCK000005
D1002
B0ACCK000005
C1064
1
QR1002
B1GBCFJJ0007
SWITCH
AINSW+
AINSW-
R1071
33
R1073
33
R1075
33
OSR0 OSR1
QR1002
VREF
IC1010
C1BB00000672
MULTI-BIT AUDIO A/D CONVERTER
C1073
1
AGND2
VCOMR
AINR+
AINR-
VCC
OVFL
OVFR
/RST
SYSCK
LRCK
AGND
BCLK
SDATA
VREF AGND1 VCOML AINL+ AINL- FMT1 M/S OSR0 OSR1 OSR2 BYPASS FMT0 DGND VDD
C1067
1
C1069
0.1
C1071
0.01
AINSL-
AINSL+
R1077
33
R1079
33
C1066
1
C1068
0.1
C1070
0.01
D1003
B0ACCK000005
D1004
B0ACCK000005
C1072
1
AINSR+
AINSR-
R1076
33
R1078
33
R1080
33
OSR0 OSR1
C1065
1
MCLK_AD
LRCK_AD
BCLK_AD
ADOUT1
OYF_S
R1095
0
MCLK_AD
LRCK_AD
BCLK_AD
ADOUT2
53
SA-XR55P / SA-XR55PC