Panasonic TH-42PV8D - Block Diagram Overview

27
9 Block Diagram
9.1. Block Diagram (1/5)
A7
HDMI2
HDMI Rx
A/D CONV.
HDMI1
A1
SD CARD I/F
+3.3V(S)
K
GS52
A52
LED/RMT
REMOTE
RESET
LED
L,R
+3.3V(STB)
+5V(S)
+3.3V(S)
G51
V,Y,PB,PR
HP
PWM
AUDIO AMP
Dig/Ana
Tuner
MONITOR L,R
+1.8V(S)
SUB+3.3V
SIF,AM
SUB+1.2V
HP L/R
+3.3V(S)
DTV
DCDC
KEY1
+15V(S)
KEY SCAN
DCDC
+1.2V(S)
SUB+1.8V
FRONT TERMINAL
Y, C , V
IECOUT
R_LED_ON
STANDBY MPU
SD CARD SLOT
G
GS
A51
from
L,R
P5
PC
K1
SD BOOT
SBO2
SBI2
(MAIN MPU+VIDEO PROCESSOR)
Peaks Lite2p
+3.3V(STB)
GenX5
+5V(S)
RESET
REMOTE
EEPROM
SOUND+15V
SOUND_SOS
BT+30V
+30V(BT)+9V(P)
KEY
L,R
Y, C , V
HDMI
L,R
RF
A12
AV3
VIDEO
AUDIO
SWITCH
HEADPHONE
AV1
R,G,B
AUDIO
PROCESSOR
SPEAKER(R)
SOUND SOS
AV2
SPEAKER(L)
PANEL_STB_ON
PANEL SIDE SOS
PANEL_STATUS
SOUND SOS DET
DIGITAL MAINA
SD DATA
DTV
IEC OUT
Digital Video Signal
LVDS
SERIAL
L,R
Y, C , V
RESET
IIC1
DDR
+5V(P)
+3.3V(P) DET MAIN ON/OFF
POWER SOS
+3.3VSTB)
CPG with SS
FLASH
MEMORY
+5V(P)
SUSTAIN CONTROL
+15V(P) DET
+5V(STB)
A32
+15V(P)
POWER_SOS
+15V(P)
A25
MPU
DCDC
DCDC
Plasma AI
H/V Sync Control
+5V(P)
+1.2V(P)
Sub Filed Processor
+3.3V(P)
+5V(P) DET
+3.3V(P)
+1.2V(P)
SOS6_SC1
PANEL STATUS
EEPROM
+2.5V(P)
Ready,ALARM
+3.3V(STB)
SOS8_SS
SOS7_SC2
+2.5V(P)
DCDC
LVDS Rx
PANEL STB_ON
LVDS
FPGA
+3.3V(P)
VIDEO DATA
+15V(P)
SOS8_SS
A31
+5V(P)
VIDEO DATA
+5V(P)
+15V(P)
A20
to/from
P25
to
C11
to/from
C21
+5V(STB)
+15V(F_STB)
+15V(SOUND)
SC20
to/from
SCAN CONTROL
L,R
ALL OFF
DDR2
CLOCK GEN
+3.3V(M)
SUB+5V SENSE
+5V(S)
SUB+5V SENSE
MAIN+3.3V SENSE
MAIN+9V SENSE
+9V(M)
+3.3V(S)
DTV+9V SENSE
+9V(S)
Thermal
sensor
L,R
(ATV or DTV)
MONITOR
OUT
G_LED_ON
PD2-M
Dischrge Control
Genx6
DVB_CVBS
FOR FACTORY USE
A33
A35
FOR FACTORY USE
A34 FOR FACTORY USE
EEPROM
V,Y,PB,PR
AV3
L,R
V
(LED:11 TIMES)
(LED:12 TIMES)
(LED:3 TIMES)
(LED:7 TIMES)
(LED:5 TIMES)
(LED:8 TIMES)
(LED:2 TIMES)
(LED:6 TIMES)
(LED:4 TIMES)
TH-42PV8D/H/HM/M/MR/MS/MT
Block (1/5) Diagram
TH-42PV8D/H/HM/M/MR/MS/MT
Block (1/5) Diagram