Philips 21PT9457 - Diagram A8, TDA937 x (IC201)

Circuit Descriptions, Abbreviation List, and IC Data Sheets
EN 50 SK4.0L CA9.
9.4.8 Diagram A8, TDA937x (IC201)
Figure 9-12 Block diagram and pin configuration
SOUND
TRAP
TUNERAGC
+8V
HOUT V-DRIVE
RO
GO
BO
BCLIN
BLKIN
CVBS/Y
IFIN
C
SDA
SCL
VISION IF
ALIGNMENT-FREE
PLL DEMOD.
AGC/AFC
VIDEO AMP.
VIDEO SWITCH
VIDEO IDENT.
VIDEO FILTERS
PAL/NTSC
DECODER
LUMA DELAY
PEAKING
BLACK STRETCH
BASE-BAND
DELAY LINE
H/V SYNC SEP.
H-OSC. + PLL
H-DRIVE
2
nd
LOOP
H-SHIFT
V-DRIVE +
CONTR/BRIGHTN
OSD/TEXT INSERT
CCC
WHITE-P. ADJ.
80C51 CPU
I
2
C-BUS
TRANSCEIVER
ROM/RAM
CLOSED CAPTION
ACQUISITION
MEMORY
OSD
DISPLAY
RG
B
BL
Y
U
V
H
V
REF
ENHANCED
VST PWM-DAC
VST OUT
I/O PORTS
I/O PORTS (4x)
+3.3 V
RESET
LED OUT (2x)
ADC IN (4x)
VPE
EW GEOMETRY
GEOMETRY
EHTO
EWD
R/V
G/Y B/U BL
RGB/YUV INSERT
R
GB
REF
CVBS
SYNC
H
V
COR
RGB/YUV MATRIX
SATURATION
YUV/RGB MATRIX
QSS SOUND IF
AGC
QSS MIXER
AM DEMODULTOR
SIFIN
QSSO/AMOUT/AUDEXT
AUDOUT/AMOUT
IFVO/SVO
(REFOUT)
Block Diagram
Pin Configuration
H_17450_012.eps
210907
handbook, halfpage
XXX
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2
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7
8
9
10
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12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64
63
62
61
60
59
58
57
56
55
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53
52
51
50
49
48
47
46
45
44
43
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40
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38
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33
TDA937X PS/N2 series (SDIP-64)
P1.3/T1
P1.6/SCL
P1.7/SDA
P2.0/TPWM
P3.0/ADC0/PWM0
P3.1/ADC1/PWM1
P3.2/ADC2/PWM2
P3.3/ADC3/PWM3
VSSC/P
P0.5
P0.6
VSSA
I.C.
VP2
DECDIG
HOUT
FBISO
PH2LF
PH1LF
GND3
AVL/EWD/
VDRB
VDRA
IFIN1
IFIN2
EHTO
IREF
VSC
AGCOUT
AUDEEM/SIFIN1
DECSDEM/SIFIN2
PLLIF
IFVO/SVO
DECBG
CVBS1
VP1
C
CVBS/Y
GND1
AUDOUT
AVL/SNDIF/REFO/
BLKIN
BO
GO
RO
BCLIN
R2/V/P
R
IN
B2/U/P
B
IN
G2/YIN
INSSW2
VDDA
VPE
VDDC
OSCGND
XTALIN
XTALOUT
RESET
VDDP
P1.0/INT1
P1.1/T0
P1.2/INT0
GND2
AUDEXT/QSSO
SNDPLL/SIFAGC
AUDEEM
DECSDEM