11-3
11-3
M5705 Pins Descriptions
Pin Name Pin No. Type Description
Servo Data Slicer Interface Pins
XSRFIN 2 I / A Analog RF signal input after passing through the equalizer.
XSIPIN 3 I / A Inverting input pin of data slicer.
XSDSSLV 5 O / A Slice level output pin.
XSRSLINT 6 I / A Reference current setting pin for analog data slicer.
Servo DAC Interface Pins
XSAWRC 8 O / A Output for enlarge VCO range. Analog output from DAC buffer.
XSRFGC 9 O / A RF gain control output.
XSEFGC 10 O / A E,F gain control output.
XSFOCUS 11 O / A Output voltage level for focusing buffer IC.
XSTRACK 12 O / A Output voltage level for tracking buffer IC.
XSSLEG 13 O / A Output voltage level for sledge buffer IC.
XSMOTOR 15 O / A Output voltage level for spindle motor buffer IC.
Servo Comparator Interface Pins
XSRFRPLP 17 I / A High bandwidth low pass filter input for RFRP.
XSTELP 18 I / A High bandwidth low pass filter input for TE.
Servo ADC Interface Pins
XSVREF2 19 I / A 2.1V reference voltage input.
XSRFRP 20 I / A RF ripple/envelope signal input.
XSTEXI 21 I / A Tracking zero crossing input signal.
XSTEI 23 I / A Tracking error input signal.
XSFEI 24 I / A Focus error input signal.
XSCEI 25 I / A 1. Center error input signal.
2. Photo Interrupt Input.
XSSBAD 27 I / A Sub-beam addition signal input.
Servo PLL Interface Pins
XSPDIREF 166 I / A Phase detector reference current generator. Connect a resistor between this
pin and ground to set reference current.
XSFDIREF 167 I / A Frequency detector reference current generator. Connect a resistor between
this pin and ground to set reference current.
XSPLLFTR2 169 I / A Data PLL loop filter pin #2.
XSFDO 171 O / A Output node of frequency detector charge pump circuit.
XSFTROPI 172 I / A Input node of loop filter OP circuit.
XSVR_PLL 173 I / A PLL reference voltage input.
XSPDOFTR2 174 I / A Phase detector filter pin #1.
XSVREFO 175 O / A Reference voltage output.
XSAWRCVCO 176 I / A Auto Wide Range Control VCO i nput pin. For enlarge VCO range in CAV mode.
Servo Control Interface Pins
XSDFCT 29 I Defect detection signal input.
XSCSJ 30 O Chip select signal for accessing control registers.
XSCLK 31 O Clock output for accessing control registers.
XSDATA 32 I/O Registers data input/output pin.
XSLDC 33 O Laser diode on/off control output for both CD/DVD.
XSFGIN 34 I Motor Hall sensor input.
XSSPDON 35 O Spindle motor on output.
XSFLAG[3:0] 36,37,
38,39
O These pins are used to monitor some status of servo control block.
Pin Name Pin No. Type Description
Microcontroller Interface Pins
XGPIO[2:0] 48,51,5
2
I/O 1. These pins are used as general purpose I/O bus.
2. When use internal microcontroller, XGPIO[2] can be used as programmable
I/O port 3.6.
XMP1_7 40 I/O Internal microcontroller programmable I/O port 1.7.
XMP1_6 41 I/O Internal microcontroller programmable I/O port 1.6.
XMP1_5 43 I/O This pin is now changed to be NC.
XMP1_4 44 I/O Internal microcontroller programmable I/O port 1.4.
XMP1_3 45 I/O Internal microcontroller programmable I/O port 1.3.
XMP1_2 47 I/O Internal microcontroller programmable I/O port 1.2.
XMP1_1 49 I/O Internal microcontroller programmable I/O port 1.1.
XMP1_0 57 I/O Internal microcontroller programmable I/O port 1.0.
This pin is default used as the A16 (microcontroller address line 16).
XMFSCSJ 46 I/O Output chip select connected to external flash ROM chip enable pin.
XMPSENJ 54 I/O Output program store enable connected to external ROM PSENJ pin.
XMALE 56 I/O This signal is used as address latch signal in address/data mux mode.
XMCSJ 70 I/O 1. This signal must be asserted for all microcontroller accesses to the
registers of this chip.
2. When use internal microcontroller, this signal can be used as
programmable I/O port 3.1.
XMRDJ 71 I/O 1. This signal is used as the Read Strobe signal.
2. When use internal microcontroller, this signal can be used as
programmable I/O port 3.0.
XMWRJ 72 I/O This signal is used as the Write Strobe signal.
XMINT1J 73 I/O 1. This signal is an interrupt line to the microcontroller.
2. When use internal microcontroller, this signal can be used as
programmable I/O port 3.7.
XMA[15:0] 91, 90,
89, 87,
74, 75,
77, 78,
79, 80,
81, 82,
83, 84,
85, 86
I/O These pins are used as address bus.
XMD[7:0] 69, 68,
67, 66,
65, 64,
63, 62
I/O These pins are used as data bus for the 16-bit processor mode, or the
address/data mux bus for the 8-bit processor mode.
Miscellaneous Pins
XTPLCK 163 I/O PLCK test pin.
XTSLRF 164 I/O SLRF test pin.
XOSC1 59 I Crystal input/ System clock. The input frequency from outside crystal or
oscillator is 33.8688Mhz.
XOSC2 60 O Crystal output.
XCRSTJ 53 I Chip Reset. An asserted low input generates a component reset that stops all
operations within the chip and deasserts all output signals. All input/output
signals are set to input.
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