Pickering 41-670 - Page 37

SECTION 4 - PROGRAMMING GUIDE
Page 4.17
PXI/PXIe LVDT/RVDT/Resolver Simulator Module 41/43-670
pickering
Attribute Codes
ATTR_VDT_AUTO_INPUT_ATTEN = 0x450,
/* Sets/Gets DWORD (0-100) for input gain (Default = 100) */
ATTR_VDT_VOLTAGE_SUM = 0x455,
/* Sets/Gets DOUBLE in Volts for VSUM value */
ATTR_VDT_VOLTAGE_DIFF = 0x456,
/* Sets/Gets DOUBLE in Volts for VDIFF value (the limit is +/- VSUM) */
ATTR_VDT_MANUAL_INPUT_ATTEN = 0x458,
/* Sets/Gets DWORD (0-255) Pot Value on LVDT */
ATTR_VDT_MODE = 0x459,
/* Sets/Gets DWORD to set mode 1 = LVDT_5_6_WIRE, mode 2= LVDT_4_WIRE. */
ATTR_VDT_DELAY_A = 0x45A,
/* Sets/Gets DWORD (0-6499) delay for OutputA */
ATTR_VDT_DELAY_B = 0x45B,
/* Sets/Gets DWORD (0-6499) delay for OutputB */
ATTR_VDT_INPUT_LEVEL = 0x45C,
/* Sets/Gets DWORD (0-65520) for Input Value */
ATTR_VDT_INPUT_FREQ = 0x45D,
/* Sets/Gets DWORD (300-20000 Hz) for Input Frequency */
ATTR_VDT_OUT_LEVEL = 0x45E,
/* Sets/Gets DWORD (0-4096) output level */
ATTR_VDT_INVERT_A = 0x460,
/* Sets/Gets DWORD (0 or 1) for OutA */
ATTR_VDT_INVERT_B = 0x461,
/* Sets/Gets DWORD (0 or 1) for OutB */
ATTR_VDT_SAMPLE_LOAD = 0x463,
/* Sets DWORD comprises of Top 16 bits is GAIN (0-100) and lower 16 frequency (300-20000 Hz) */
ATTR_VDT_INPUT_FREQ_HI_RES = 0x464,
/* Gets DWORD value of frequency in Hz */