Pickering 41-670 - Page 52

Page 7.4
SECTION 7 - MAINTENANCE INFORMATION
PXI/PXIe LVDT/RVDT/Resolver Simulator Module 41/43-670
pickering
Resolver
Gain Verication Procedure
• Setup
1. Close all the required input and output relays
2. Adjust input attenuator
3. Set channel mode to resolver
4. Set the maximum output level (VSUM) to its minimum setting according to Table 7.1 to 7.5 (depending
upon the version being tested)
• Procedure
1. Set the position to 0.0°
2. Measure the AC RMS voltage on the cosine output and record the value
3. Set the position to 90.0°
4. Measure the AC RMS voltage on the sine output and record the value
5. Check that the measurements are within the limits indicated by the corresponding table
6. Increase the maximum output level (VSUM) to the next step according to the table, and wait for 1 second
after setting the value
7. Repeat steps 1-6 for every VSUM value on the table. All readings should be within the indicated range
Linearity Verication Procedure
• Setup
1. Close all the required input and output relays
2. Adjust input attenuator
3. Set channel mode to resolver
4. Set position to -180.00°
5. Set the maximum output level (VSUM) to its maximum setting
• Procedure
1. Measure the AC RMS voltage on both outputs and record the values
2. Check that the measured position is within the limits indicated by the corresponding table
3. Increase the position setting to the next step according to Table 7.7 to 7.11 (depending upon the version
being tested)
4. Repeat steps 1-3 for every position setting on the table. All measurements should be within the indicated
range
Notes
1- The user can also verify the phase relationship between the excitation and each of the outputs for every position
setting if the inputs and outputs (i.e. the sine output should be in phase with the excitation for positions in the range
[0°;180°] and 180° out of phase for any other position setting) are also connected to oscilloscope inputs.