Quectel M66

GSM/GPRS Module Series
M66 Hardware Design
M66_Hardware_Design Confidential / Released 7 / 80
Figure Index
FIGURE 1: MODULE FUNCTIONAL DIAGRAM ............................................................................................... 14
FIGURE 2: PIN ASSIGNMENT ......................................................................................................................... 16
FIGURE 3: VOLTAGE RIPPLE DURING TRANSMITTING .............................................................................. 22
FIGURE 4: REFERENCE CIRCUIT FOR THE VBAT INPUT ........................................................................... 23
FIGURE 5: REFERENCE CIRCUIT FOR POWER SUPPLY ............................................................................ 24
FIGURE 6: TURN ON THE MODULE WITH AN OPEN-COLLECTOR DRIVER .............................................. 25
FIGURE 7: TURN ON THE MODULE WITH A BUTTON .................................................................................. 25
FIGURE 8: TURN-ON TIMING .......................................................................................................................... 26
FIGURE 9: TURN-OFF TIMING ........................................................................................................................ 27
FIGURE 10: TIMING OF RESTARTING SYSTEM ............................................................................................ 28
FIGURE 11: VRTC IS SUPPLIED BY A NON-CHARGEABLE BATTERY ........................................................ 31
FIGURE 12: VRTC IS SUPPLIED BY A RECHARGEABLE BATTERY ............................................................ 31
FIGURE 13: VRTC IS SUPPLIED BY A CAPACITOR ...................................................................................... 32
FIGURE 14: REFERENCE DESIGN FOR FULL-FUNCTION UART ................................................................ 35
FIGURE 15: REFERENCE DESIGN FOR UART PORT ................................................................................... 36
FIGURE 16: REFERENCE DESIGN FOR UART PORT WITH HARDWARE FLOW CONTROL .................... 36
FIGURE 17: REFERENCE DESIGN FOR FIRMWARE UPGRADE ................................................................. 37
FIGURE 18: REFERENCE DESIGN FOR DEBUG PORT ............................................................................... 37
FIGURE 19: REFERENCE DESIGN FOR AUXILIARY UART PORT ............................................................... 38
FIGURE 20: LEVEL MATCH DESIGN FOR 3.3V SYSTEM .............................................................................. 38
FIGURE 21: SKETCH MAP FOR RS-232 INTERFACE MATCH ...................................................................... 39
FIGURE 22: REFERENCE DESIGN FOR AIN ................................................................................................. 41
FIGURE 23: HANDSET INTERFACE DESIGN FOR AOUT1 ........................................................................... 42
FIGURE 24: SPEAKER INTERFACE DESIGN WITH AN AMPLIFIER FOR AOUT1 ....................................... 42
FIGURE 25: HANDSET INTERFACE DESIGN FOR AOUT2 ........................................................................... 43
FIGURE 26: SPEAKER INTERFACE DESIGN WITH AN AMPLIFIER FOR AOUT2 ....................................... 43
FIGURE 27: EARPHONE INTERFACE DESIGN .............................................................................................. 44
FIGURE 28: LONG SYNCHRONIZATION & SIGN EXTENSION DIAGRAM ................................................... 46
FIGURE 29: LONG SYNCHRONIZATION & ZERO PADDING DIAGRAM....................................................... 47
FIGURE 30: SHORT SYNCHRONIZATION & SIGN EXTENSION DIAGRAM ................................................. 47
FIGURE 31: SHORT SYNCHRONIZATION & ZERO PADDING DIAGRAM .................................................... 47
FIGURE 32: REFERENCE DESIGN FOR PCM ............................................................................................... 48
FIGURE 33: REFERENCE CIRCUIT FOR SIM INTERFACE WITH THE 6-PIN SIM CARD HOLDER ........... 50
FIGURE 34: RI BEHAVIOR OF VOICE CALLING AS A RECEIVER ................................................................ 52
FIGURE 35: RI BEHAVIOR AS A CALLER ....................................................................................................... 52
FIGURE 36: RI BEHAVIOR OF URC OR SMS RECEIVED ............................................................................. 52
FIGURE 37: REFERENCE DESIGN FOR NETLIGHT ..................................................................................... 53
FIGURE 38: RFTXMON SIGNAL DURING BURST TRANSMISSION ............................................................. 54
FIGURE 39: RFTXMON SIGNAL DURING CALL ............................................................................................. 55
FIGURE 40: REFERENCE DESIGN FOR GSM ANTENNA ............................................................................. 56
FIGURE 41: RF SOLDERING SAMPLE ........................................................................................................... 59
Quectel
Confidential