Quectel Smart EVB G5 - Page 51

Smart Module Series
Smart_EVB_G5_User_Guide 50 / 66
TXS0104EPWR
RXD_3.3V
CTS_3.3V
TXD_3.3V
RXD_1.8V
CTS_1.8V
VCCA
Module
GND
GND
1.8V
VCCB
3.3V
DIN1
ROUT3
ROUT 2
ROUT1
DIN4
DIN3
DIN2
DIN 5
R1OUTB
FORCEON
/
3.3V
DOUT1
DOUT2
DOUT3
DOUT4
DOUT5
RIN3
RIN2
RIN1
VCC GND
OE
SN65C3238
RTS
TXD
CTS
RXD
GND
UART_TXD
UART_RTS
UART_RXD
UART_CTS
UART
/INVALID
FORCEOFF
TXD_1.8V
RTS_1.8V
RTS_3.3V
Figure 33: RS-232 Level Match Circuit
The following figure shows the pin assignments of main UART and debug UART.
J1301
J1302
235
78
Figure 34: Pin Assignments of Main UART and Debug UART
Table 21: Pin Definition of Main UART
Pin No.
Pin Name
Description
2
Main_UART_TXD
Transmit data
3
Main_UART_RXD
Receive data
5
Main_UART_GND
Ground
7
Main_UART_CTS
Clear to send
8
Main_UART_RTS
Request to send