Rockchip RK3288 - PCB Layout

RK3288 Hardware Design Guide
 Differential signal is sensitive to traces parasitic capacitance, so low junction
capacitance (less than 1pF) should be selected as ESD protective component which
conform to the specification on the signal path.
14.2 PCB Layout
 Signal connector should be placed close to chip, to shorten trace length;
 MIPI, eDP, HDMI signal traces should fully comply to differential specification, length
difference between two signal traces in the same pairs should be limited within 10mil,
length difference between two signal traces in different pairs should be within 30mil;
Take trace corner always as an arc or obtuse angle, not a right angle or acute angle,
impedance is Z=100ohm±10ohm;
 LVDS signal traces should fully comply to differential specification, length difference
between two signal traces in the same pairs should be limited within 30mil, length
difference between two signal traces in different pairs should be within 100mil; Take
trace corner always as an arc or obtuse angle, not a right angle or acute angle,
impedance is Z=100ohm±10ohm;
 On the RK3288 platform, the whole length of MIPI network should be limited within 10
inch (include the length of PCB layout, FPC connecting lines and receiver traces), no
more than 15 inch, or it will affect signal quality.
 On the RK3288 platform, traces length of eDP network should be limited within 12.4
inch at signal transfer rate of 2.7 Gbps, and it should be limited within 5 inch at signal
transfer rate of 5.4 Gbps
 On the RK3288 platform, traces length of HDMI network should be limited within 5
inch, no more than 3 inch. If discontinuousness of impedance caused by via holes
between different layers is inevitable, suggest to control the change of impedance
between different layers within 10% and place a via hole close to each differential
Pairs between different layers to provide a signal return path.
 To reduce EMI, high-speed differential signal of eDP, MIPI and HDMI should be placed
on inner layer, and make sure trace reference plane is continuous and complete, it
can't be segmented, or else it will cause discontinuousness of differential trace
impedance and increase effect on differential signal from external noise. If the trace is
on PCB surface layer, it should be surrounded by GND;
 Use less vias between different layers in high-speed signal trace of eDP, MIPI and
HDMI if possible, otherwise it will cause discontinuous impedance;
 Place ESD component close to HDMI socket, as shown in Fig 14-11;