DISK DRIVE OPERATION
SpinPoint P80
Product Manual Rev. 01
30
• Support for Master/Slave configuration of two embedded disk controller drives.
• Automatic detection of Host status reads.
•
Support of both LBA and CHS Task File registers formats.
• Automatic detection of both the software AT reset and hardware AT reset.
• Support for PIO modes 0 through 4.
•
Support for multiword DMA modes 0 through 2.
• Support for synchronous DMA (UDMA) transfer mode 0 through 6.
5.2.2.2 The Buffer Control Block
The Buffer Control block manages the flow of data into and out of the buffer. Significant automation allows
buffer activity to take place automatically during read/write operations between the host and the disk. This
automation works together with automation within the Host Interface Control and Disk Control blocks to
provide more bandwidth for the local microprocessor to perform non-data flow functions.
The buffer control circuitry keeps track of buffer full and empty conditions and automatically works with the
Disk Control block to stop transfers to or from the disk when necessary. In addition, transfers to or from the
host are automatically stopped or started based on buffer full or empty status.
A prioritized five ports architecture is implemented. All ports, except the refresh port, utilize 22-bit buffer
address pointers.
The data path to the buffer RAM can be configured as 16-bit path in ATA mode.
Additional functionality is provided in the Buffer Control block through the following features:
• Increased automation to support minimal latency read operations with minimal latency.
•
Capability to support the execution of multiple consecutive Auto-Write commands without loss of data
due to overwriting of data.
• Auto write pointer.
•
A disk sector counter that can monitor the transfers between the disk and buffer.
• Read/Write cache support.
5.2.2.3 The Disk Control Block
The 88I5522 Disk Control block manages the flow of data between the disk and the buffer. It is capable of
performing completely automated track read and write operations at a maximum data rate of 1 Gbits/sec in
byte wide NRZ mode. Many flexible features and elements of automation have been incorporated to
complement the automation contributed by the Host and Buffer blocks.
The Disk Control block consists of the programmable sequencer (Disk Sequencer), CDR/data split logic, disk
FIFO, fault tolerant sync detect logic, and other support logic.
The programmable sequencer contains a 31-by-2 byte programmable SRAM and associated control logic,
which is programmed by the user to automatically control all single track format, read, and write operations.
From within the sequencer micro program, the Disk Control block can automatically deal with such real time
functions as defect skipping, servo burst data splitting, branching on critical buffer status and data compare
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