Sharp HT-CN410DVH - Page 56

HT-CN410DVH
56
IC303, 192 kHz Multi-bit audio A/D Converter (CS5342)
IC5002, Headphone Driver with Mute (APA 3541-TRL)
Block Diagram
Pin Name # Pin Description
M0 1 Mode Selection (Input) - Determines the operational mode of the device.
M1 16
MCLK 2 Master Clock (Input) - Clock source for the delta-sigma modulator and digital filters.
VL 3 Logic Power (Input) - Positive power for the digital input/output.
SDOUT 4 Serial Audio Data Output (Output) - Output for two's complement serial audio data.
GND 5 Ground (Input) - Ground reference. Must be connected to analog ground.
VD 6 Digital Power (Input) - Positive power supply for the digital section.
SCLK 7 Serial Clock (Input/Output) - Serial clock for the serial audio interface.
LRCK 8 Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently
active on the serial audio data line.
RST 9 Reset (Input) - The device enters a low power mode when low.
AINL 10 Analog Input (Input) - The Full scale analog input level is specified in the Analog
AINR 12 Characteristics specification table.
VQ 11 Quiescent Voltage (Output) - Filter connection for the internal quiescent
reference voltage.
VA 13 Analog Power (Input) - Positive power supply for the analog section.
REFGND 14 Reference Ground (Output) - Ground reference for the internal sampling circuits.
FILT+ 15 Positive Voltage Reference (Output) - Positive reference voltage for the internal
sampling circuits.
Input B
Out B
BIAS
Mute
Out A
Input A
BIAS
+
A
B
+
1
2
3
4
V
SS
5
6
7
8
V
DD
0dB
(6dB)
0dB
(6dB)
180kΩ
(90kΩ)
180kΩ

(90kΩ)
* The values in parenthessis are for the APA3544.
MUTE