Sharp SM-SX1 - Page 39

SM-SX1/SX1W
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1, 2 DI Input with pull-up resistor Input data
3, 4 BCKI Input with pull-up resistor Bit clock on the input side
5 LRCI Input with pull-up resistor Word clock on the input side
6 ICLK Input System clock input on the input side
7 ICKSL Input with pull-up resistor System clock on the input side (ICLK) selection. H:384fsi, L: 256fsi
Input format setting at IFM1 and IFM2
8*, 9* IFM1 Input with pull-up resistor
10, 11 IFM2 Input with pull-up resistor
12, 13 VDD — Power supply terminal (5V)
14, 15 DMUTE Input with pull-up resistor (Direct) mute
16 MCOM Input with pull-up resistor Function switch of 17 to 20 pins
17 MDT/FSI1 Input with pull-up resistor In case of MCOM=H, Microcomputer data input: MDT
In case of MCOM=L, De-emphasis frequency setting: FSI1
In case of MCOM=H, Bit-clock for microcomputer data input: MCK
In case of MCOM=L, De-emphasis frequency setting :FSI2
Input sample frequency setting (for de-emphasis)
18 MCK/FSI2 Input with pull-up resistor
19, 20 MLEN/DEEM Input with pull-up resistor In case of MCOM=H, Microcomputer data word latch clock: MLEN
In case of MCOM=L, De-emphasis ON/OFF control: DEEM
Output format setting with OW18N, OW20N
Time of IISN=H (normal mode)
21, 22 OW18N Input with pull-up resistor
Time of IISN=L (IIS mode)
23, 24 OW20N Input with pull-up resistor
25, 26 IISN Input with pull-up resistor IIS output mode selection. H: Normal mode, L: IIS mode
27* STATE Output Output to express the internal operational state (for operation check)
28* TST1N Input with pull-up resistor Control of output dither. H: Dither OFF, L: Dither ON
29* TST2N Input with pull-up resistor Test terminal. Set at H.
30, 31 RSTN Input with pull-up resistor Reset terminal
32, 33 VSS — GND terminal (0V)
IC801 VHiSM5844AF-1: Sampling Rate Converter (SM5844AF) (1/2)
Pin No. Port Name Input/Output
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
• Outline
SM5844AF is a special LSI for sampling rate converter, having a function to asynchronously covert the sample rate of the digital
audio signal. The input/output interface correspond to the input data of 16/20-bit word length and the output data of 16/18/20-bit
word length. Moreover, it integrates the digital de-emphasis filter, digital attenuator and other functions.
The package is a 44-pin QFP type, and the LSI is excellent in the cost performance.
Function
FSI
FSI1
FSI2
32.0 kHz H H
44.1 kHz X L
48.0 kHz L H
IFM1
Terminal
IFM2
Terminal
Word
Length
Data Sequence Data Position
L L 16 Bit
Backward packing
L H MSB first
H L 20 Bit Forward packing
H H LSB first Backward packing
Output Format
OW20N OW18N
16 Bit H H
18 Bit Backward packing H L
20 Bit
LH
Forward packing L L
Output Format
OW20N OW18N
16 Bit H H
18 Bit IIS Mode H L
20 Bit
Forward packing L H
LL