Sinclair ZX Spectrum 128 Service Manual

Sinclair ZX Spectrum Service Manual
Spectrum For Everyone https://spectrumforeveryone.com/
6
CPU Clock: Returning to the CPU clock mentioned earlier in this section, the ULA is able to inhibit this
input bringing the CPU to a temporary halt. This mechanism gives the ULA absolute priority allowing it to
access the contended RAM without interference from the CPU (see RAM description). Switching
transistor TR3 ensures that the clock amplitude is +5v rather than some arbitrary TTL level. This is
essential if the CPU is to operate effectively while executing fast machine code programs of the ‘space
invader’ type.
Dynamic Memory Refresh: The CPU incorporates built-in dynamic RAM refresh circuitry. As part of the
instruction opcode fetch cycle, the CPU performs a memory request after first placing the refresh
address on the lower eight bits of the address bus. At the end of the cycle the address is incremented so
that over 255 fetch cycles, each row of the dynamic RAM is refreshed.
The Z80 address space is allocated according to the two most significant bits of the address bus
(ZA14.15) and the contents of the bank register IC31 which is at address 7FFD
H
in the Z8O's I/O space.
The significance of the register bits is summarised below:
Bits
Function
B2-B0
B3
B4
B5
Selects the page occupying the top 16K of the Z80 address space. Any RAM page can
occupy the space.
Instructs the ULA to access the display mapped in page 5 or 7.
Bit set: screen in page 7
Bit clear: screen in page 5
Determines whether instruction fetches are from ROM 0 or ROM 1*
Bit set: fetches from the 48K Spectrum ROM (ROM 1)
Bit clear: fetches from the 128K Spectrum ROM (ROM 0)
Set to prevent further accesses to the bank register (protection against SPECTRUM
programs crashing if the bank register is written to in error)
* see para. 4.12.2
Clearly, dependent on register bits B2-B0, the Z80 can access page 2 at address 8000
H
or C000
H
and the
screen in page 5 at address 4000
H
or C000
H
. The screen in page 7 can only be accessed at address C000
H
.
On power up, or after reset the bank register is cleared and loads page 0 at address C000
H
, selects the
128K Spectrum ROM at address 0000
H
and informs the ULA that screen accesses are from page 5.
This mechanism only applies to the non-contended RAM area. An alternative refresh method is adopted
for the contended RAM.

Sinclair ZX Spectrum 128 Specifications

General

Brand	Sinclair
Model	ZX Spectrum 128
Category	Desktop
Language	English