Table of Contents
1. Work Flow Using ClockBuilder Pro and the Register Map...............5
1.1 Field Programming ............................5
2. Family Product Comparison..........................6
2.1 Grade P (Precision) Restrictions and Requirements .................6
2.2 Si5391P Grade Frequency Plan Rules ......................6
2.2.1 Output Clock Domains ..........................6
2.2.2 Output Clock Locations..........................6
2.2.3 Output Clock Format Restrictions ......................7
3. Functional Description............................8
3.1 Dividers ................................9
4. Power-up, Reset, and Initialization ...................... 10
5. Dynamic PLL Changes............................11
5.1 Dynamic Changes to Output Frequencies without Changing PLL Settings ..........11
5.2 Dynamic Changes to Output Frequencies while Changing PLL Settings Using a CBPro Register
Map .................................12
6. NVM Programming ............................ 13
7. Clock Inputs............................... 15
7.1 Reference Input Selection (IN0, IN1, IN2, XA/XB) ..................16
7.2 Types of Inputs ..............................17
7.2.1 Crystal on XA/XB............................17
7.2.2 Clock Input on XA/XB ..........................18
7.2.3 Clock Inputs on IN2, IN1, IN0 .......................19
7.2.4 Unused Inputs.............................20
7.2.5 Input Clock Rise Time Considerations .....................20
7.3 Fault Monitoring .............................21
7.3.1 Status Indicators ............................22
7.3.2 Interrupt Pin (INTR) ...........................23
8. Outputs ................................ 25
8.1 Output Crosspoint Switch ..........................25
8.2 Output Divider (R) Synchronization .......................26
8.3 Performance Guidelines for Outputs .......................27
8.4 Output Signal Format ............................28
8.4.1 Differential Output Terminations .......................29
8.4.2 Differential Output Swing Modes ......................30
8.4.3 Programmable Common Mode Voltage for Differential Outputs ............31
8.4.4 LVCMOS Output Terminations .......................31
8.4.5 LVCMOS Output Impedance and Drive Strength Selection ..............31
8.4.6 LVCMOS Output Signal Swing .......................32
8.4.7 LVCMOS Output Polarity .........................33
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com
2 Rev. 0.5 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • January 11, 2022 2
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