15.6 Page A Registers Si5341
Table 15.86. 0x0A03 N Divider Clocks
Reg Address Bit Field Type Name Description
0x0A03 4:0 R/W N_CLK_TO_OUTX_EN Bits in this field correspond to the N dividers as [N4 N3
N2 N1 N0]. If an N divider is used, the corresponding bit
must be 1. See also registers 0x0A05 and 0x0B4A[4:0]
Table 15.87. 0x0A04 N Divider Phase Interpolator Bypass
Reg Address Bit Field Type Name Description
0x0A04 4:0 R/W N_PIBYP Bypasses the Phase Interpolator of the N Multisynth di-
vider. Set to a 1 when the value of N divider is integer
and will not be used as a DCO. Set to a 0 when the
value of N is fractional (used as a DCO). Slightly lower
output jitter may occur when the Phase Interpolator is
bypassed (=1). Bits in this field correspond to the N
dividers as [N4 N3 N2 N1 N0]
A soft reset reg 0x001C [0] should be asserted after changing any of these bits. If it is expected that any of the N dividers will
be changing from integer to fractional, it is recommended that the corresponding bits be initialized to 0 so that when the change
from integer to fractional occurs there will be no need for a soft reset. For this reason DCO (digitally controlled oscillator) and FOTF
(frequency on the fly) applications should have zeros for these bits. See AN858: DCO Applications with Jitter Attenuators .
Table 15.88. 0x0A05 N Divider Power Down
Reg Address Bit Field Type Name Description
0x0A05 4:0 R/W N_PDNB Powers down the N divider. If an N divider is not used,
set the respective bit to 0 to power it down. Bits in this
field correspond to the N dividers as [N4 N3 N2 N1 N0].
See also registers 0x0A03 and 0x0B4A[4;0]
Table 15.89. 0x0A38 N0 Dynamic Phase Adjust Step Size
Reg Address Bit Field Type Name Description
0x0A38 7:0 R/W N0_PHASE_STEP N0 step size from 1 to 255 in units of Tvco, the VCO
period.
N0_PHASE_STEP and N0_PHASE_COUNT are used to produce a phase change anywhere from 0 degrees to 360 degrees with a
resolution of the VCO period. N0_PHASE_STEP can be invoked multiple times by using N0_PHASE_COUNT. The phase change is
initiated by writing to either N0_PHASE_INC or N0_PHASE_DEC (at addr 0x0A3B). The resulting phase change will be:
N0_PHASE_STEP * N0_PHASE_COUNT * Tvco, for Tvco = 1 / Fvco
Table 15.90. 0x0A39 N0 Dynamic Phase Adjust Step Size Count
Reg Address Bit Field Type Name Description
0x0A39 7:0 R/W N0_PHASE_COUNT Lower byte of number of N0 step size changes.
0x0A3A 15:8 R/W N0_PHASE_COUNT Upper byte of number of N0 step size changes.
Si5391 Reference Manual • Si5391A/B Register Map
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