Sony DP-RF6000 - Page 18

18
DP-RF6000
Pin No. Pin Name I/O Description
59 CLKOUT — Not used (Open)
60 A9 — Not used (Open)
61 CLKIN I Not used (Pull up)
62,63 A8, A7 — Not used (Open)
64 CLKEN — Not used (Open)
65 to 67 A6 to A4 — Not used (Open)
68 SD_CS — Not used (Open)
69 VSSSD1 — Ground
70 VDDSD1 — Power supplyl (+3.3V)
71 to 76 A19 to A10, A0 to A3 — Not used (Open)
77 RAS — Not used (Open)
78 CAS — Not used (Open)
79 to 82 GPIO27 to GPIO24 — Not used (Open)
83,84 NC4, NC3 — Not used (Connect to Groundl)
85,86 GPIO23, GPIO22 — Not used (Open)
87 LRCLK1 I Sample rate clock signal input from LC98052T-TLM-E
88,89 NC2, NC1 — Not used (Connect to Ground)
90 VDD1 — Power supply (+2.5V)
91 VSS1 — Ground
92 to 94 GPIO31 to GPIO29 — Not used (Open)
95 to 97 GPIO7 to GPIO5 — Not used (Open)
98 SCLK1 I Serial clock signal input from LC98052T-TLM-E
99 MCLK I Master clock signal input from LC98052T-TLM-E
100 VDD2 — Power supply (+2.5V)
101 VSS2 — Ground
102 GPIO28 — Not used (Open)
103 GPIO4 — Not used (Open)
104 SCLK0 I Serial clock signal input from LC98052T-TLM-E
105 GPIO3 — Not used (Open)
106 XMT958A — Not used (Open)
107 DT2 — Not used (Open)
108 LRCK0 I Sample rate clock signal input from LC98052T-TLM-E
109 DT1 — Not used (Open)
110 DT0 — Digital data output to TX-RF block
111 FSCLKN2 I Serial clock signal input from LC98052T-TLM-E
112 GPIO2 — Not used (Open)
113 VSS3 — Ground
114 VDD3 — Power supply (+2.5V)
115,116 GPIO1, GPIO0 — Not used (Open)
117 FLRCLKN2 I Sample rate clock signal input from LC98052T-TLM-E
118 FSDATAN2 I Digital data inpu from LC98052T-TLM-Et
119 FLRCLKN1 I Sample rate clock signal input from LC98052T-TLM-E
120,121 GPIO10, GPIO11 — Not used (Open)
122 PLLVSS — Ground
123 FILT2 — PLL filter externally connecting terminal
124 FILT1 — PLL filter externally connecting terminal
125 PLLVDD — Power supply (+2.5V)
126 XTALO — Not used (Open)
127 CLKIN I Master clock signal input from LC98052T-TLM-E
128 CLKSEL I DSP clock select (Connect to Ground)