3-3. SYSTEM CONTROL/SIGNAL PROCESSOR BLOCK DIAGRAM
145
146,147,149~151,158~160
IC102
IC101
CXD9849R
MICROPROCESSOR
AVDECODER
SERVO DSP
16M ROM
IC104
64M SDRAM
RAO~RA11
53~61,67~72,74~76,78,89,92,93
AO~A20
115,117,118,120,121,123~126,128~133,135
RDO-RD15
81~84,86~88,91
HDO – HD7
DQM1
DQMO
BA1
SCL
SDA
113 137143
BA0
140
RAS
139
CAS
138
RWE
142
RCS
156
RCLK
157
CKE
101
110
100
99
98
105
IFSCK
IFSDO
IFBSY
66
77
79
IOWR
IOCS
IOOE
IFSDI
PRST
XIFCS
ACLK
SPDIF
XRST
MAMUTE
176
220
225
215
SPDIF
ACLK
ABCK
ALRCK
214
213
ABCK
ALRCK
MAMUTE
C
V MUTE
Y
V
Y/G
CB/B
CR/R
WIDE
196194198200202203209
ASDATA4
222
ASDATA4
C
Y
CVBS
Y/G
CB/B
CR/R
WIDE
229228
XTALI
XTALO
XRST
102
103
6
5
IC103
EEPROM
SCL
SDA
IC101 C/BAR PB
5
IC101 C/BAR PB
6
IC101
7
IC101
8
202
203
200
198
199
196
IC101 C/BAR PB
4
IC101 C/BAR PB
3
IC 108
RESET IC
CN 106
1
MV-045 BOARD
(SEE PAGE 4-7 to 4-8)
TO MV-045
AUDIO
(SEE PAGE 3-9)
TO MV-045
VIDEO
(SEE PAGE 3-11)
IFBSY
IFSCK
IFSDO
XIFCS
IFSDI
XSYSRST
V MUTE
A MUTE
TO IF 127
INTERFACE
(SEE PAGE 3-13)
A_MUTE
TO MV-045
AUDIO
(SEE PAGE 3-10)
9
5
7
4
6
2
10
14
0.7Vp-p
27MHz
3.3Vp-p
IC101
9
228
63.5usec
0.7Vp-p
63.5usec
1Vp-p
63.5usec
280 mVp-p (NTSC)
300 mVp-p (PAL)
63.5us
1Vp-p
63.5usec
1Vp-p
63.5usec
IC101
11
215
3.3Vp-p
24MHz
IC101
10
156
3.3Vp-p
110MHz
X102
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