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~ BE1F Board Schematic Diagram [ Micro Processor, Video/Audio Processor, Audio Amplifier, AV Switch, Tuner, Rear Input Terminals ] Page 8C/14 ~
FE_+2V5 FE_+3V3
GND
GND
GND
FE_DQ[0-15]
011:H2
FE_DADD[0-12]
011:H5
FE_DBA0,FE_DBA1,FE_DCASB,FE_DCKE,FE_DCLK,FE_DCLKB,FE_DCSB,FE_DQM0,FE_DQM1,FE_DQS0,FE_DQS1,FE_DRASB,FE_DVREF,FE_DWEB
011:I6
JL7101
E5 E17 F5 F17 G5 G17 T17 U5 U6 U17 E8 E9 E10 E11 E12 E13 E6 E7 E14 E15 E16 H5
A16
B16
A15
B15
A14
B14
A13
B13
D13
C13
D14
C14
D15
C15
D16
C16
D12
A9
B9
D8
A8
B8
A7
B7
A6
B6
D6
C6
D7
C7
C8
D9
A11
A12
C11
C12
C9
D10
C10
D11
B10
A10
B11
B12
Y17
W17
V17
AA17
AA16
Y16
W16
V16
AA15
A1
B2
A2
B3
A3
C4
B4
A4
A5
D5
F4
N4
P2
G2
R2
G1
K3
V1
C1
Y1
P3
B1
E4
UPD61123F1-100-KA3-A
IC7100
DQ15
A16
DQ14
B16
DQ13
A15
DQ12
B15
DQ11
A14
DQ10
B14
DQ9
A13
DQ8
B13
DQ7
D13
DQ6
C13
DQ5
D14
DQ4
C14
DQ3
D15
DQ2
C15
DQ1
D16
DQ0
C16
DADD13
D12
DADD12
A9
DADD11
B9
DADD10
D8
DADD9
A8
DADD8
B8
DADD7
A7
DADD6
B7
DADD5
A6
DADD4
B6
DADD3
D6
DADD2
C6
DADD1
D7
DADD0
C7
DBA1
C8
DBA0
D9
UDQM
A11
UDQS
A12
LDQM
C11
LDQS
C12
DCSB
C9
DRASB
D10
DCASB
C10
DWEB
D11
DCKE
B10
DCLK
A10
DCLKB
B11
DVREF
B12
VDI_D7 / PPORT121
Y17
VDI_D6 / PPORT120
W17
VDI_D5 / PPORT119
V17
VDI_D4 / PPORT118
AA17
VDI_D3 / PPORT117
AA16
VDI_D2 / PPORT116
Y16
VDI_D1 / PPORT115
W16
VDI_D0 / PPORT114
V16
VDI_VCK / PPORT113
AA15
STP0_DAT7 / PPORT8
A1
STP0_DAT6 / PPORT7
B2
STP0_DAT5 / PPORT6
A2
STP0_DAT4 / PPORT5
B3
STP0_DAT3 / PPORT4
A3
STP0_DAT2 / PPORT3
C4
STP0_DAT1 / PPORT2
B4
STP0_DAT0 / PPORT1
A4
STP0_EN / PPORT9
A5
STP0_CLK / PPORT0
D5
REGB / PPORT34
F4
IOWRB / PPORT31
N4
IORDB / PPORT30
P2
INPACKB / PPORT33
G2
GPIO_VS1B / PPORT28
R2
GPIO_RESET / PPORT32
G1
GPIO_IREQB / PPORT24
K3
GPIO_CD1B / PPORT26
V1
GPIO_CD2B / PPORT35
C1
PCE1B(CE2B_2) / PPORT36
Y1
PCE0B(CE2B_1) / PPORT27
P3
IOSI16B / PPORT25
B1
STP1 STRT / PPORT38
E4
VDD3
E5
VDD3
E17
VDD3
F5
VDD3
F17
VDD3
G5
VDD3
G17
VDD3
T17
VDD3
U5
VDD3
U6
VDD3
U17
VDD2
E8
VDD2
E9
VDD2
E10
VDD2
E11
VDD2
E12
VDD2
E13
VDD1
E6
VDD1
E7
VDD1
E14
VDD1
E15
VDD1
E16
VDD1
H
0uH
FB7102
FE_+2V5_DDR
0uH
FB7104
FE_REGB
012:D2
FE_CI1_RSTB
012:D1
FE_IOWRB
012:B10;012:D1
FE_IORDB
012:D1
FE_AVC_656CLK,FE_AVC_656[0-7]
013:N3
FE_CI1_VS1B
012:M4
FE_CI1_IREQB
012:D3
FE_CI1_CD1B
012:M4
FE_CI1_CD2B
012:M4
10k
R7143
FE_+3V3
FE_CI_TSCLK,FE_CI_TSSYNC,FE_CI_TSVAL
012:B9
FE_CI1_INPACKB
012:D3
47R7102
47R7109
47R7111
47R7112
FE_M_CKOUT,FE_M_SYNC,FE_M_VAL
010:E2;012:B5;013:N7;015:9K
FE_M_DATA[0-7]
012:B5;013:N7;015:9K
25V
10
C7117
105
0
FB7126
CHIP
0
FB7120
CHIP
0 FB7127
CHIP
0 FB7121
CHIP
0 FB7128
CHIP
0
FB7122
CHIP
0 FB7129
CHIP
0 FB7123
CHIP
0 FB7124
CHIP
0 FB7125
CHIP
10V
4.7
2012
C7101
0.1
C7110
0.1
C7111
0.1
C7112
0.1
C7113
0.1
C7114
0.1
C7115
0.1
C7121
0.1
C7122
0.1
C7123
0.1
C7124
0.1
C7125
0.1
C7126
0.1
C7127
FE CI TSVAL
FE_CI_TSSYNC
FE_DADD[0]
FE_DADD[1]
FE_DADD[2]
FE_DADD[3]
FE_DADD[4]
FE_DADD[5]
FE_DADD[6]
FE_DADD[7]
FE_DADD[8]
FE_DADD[9]
FE_DADD[10]
FE_DADD[11]
FE_DADD[12]
FE_DRASB
FE_DCSB
FE_DQS0
FE_DQM0
FE_DQS1
FE_DQM1
FE_DBA0
FE_DBA1
FE_DCKE
FE_DWEB
FE_DCASB
FE_DCLKB
FE_DCLK
FE_DADD[13]
FE_DVREF
FE_AVC_656[0]
FE_AVC_656[1]
FE_AVC_656[2]
FE_AVC_656[3]
FE_AVC_656[4]
FE_AVC_656[5]
FE_AVC_656[6]
FE_AVC_656[7]
FE_AVC_656CLK
FE_DQ[0]
FE_DQ[1]
FE_DQ[2]
FE_DQ[3]
FE_DQ[4]
FE_DQ[5]
FE_DQ[6]
FE_DQ[7]
FE_DQ[8]
FE_DQ[9]
FE_DQ[10]
FE_DQ[11]
FE_DQ[12]
FE_DQ[13]
FE_DQ[14]
FE_DQ[15]
FE_M_DATA[7]
FE_M_DATA[6]
FE_M_DATA[5]
FE_M_DATA[4]
FE_M_DATA[3]
FE_M_DATA[2]
FE_M_DATA[1]
FE_M_DATA[0]
FE_M_VAL
FE_M_CKOUT
THESE CAPACITORS TO BE PLACED UNDERNEATH BGA
THESE CAPACITORS TO BE PLACED UNDERNEATH BGA
DIFFERENTIAL PAIR
OF CLOCK SIGNALS
THIS CAPACITOR TO BE
PLACED UNDERNEATH BGA
/ CTS1B
/ RTS1B
UNCONTROL
Component Reference range
7100~7199
BE1F
8C/14
BE1F.-WAX3F
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General
Weight and Dimensions
