ST STM32F101xx series User Manual

Reading/programming the embedded Flash memory PM0075
20/31 Doc ID 17863 Rev 1
Table 7. Option byte organization
Address [31:24] [23:16] [15:8] [7:0]
0x1FFF F800 nUSER USER nRDP RDP
0x1FFF F804 nData1 Data1 nData0 Data0
0x1FFF F808 nWRP1 WRP1 nWRP0 WRP0
0x1FFF F80C nWRP3 WRP3 nWRP2 WRP2
Table 8. Description of the option bytes
Flash memory
address
Option bytes
0x1FFF F800
Bits [31:24] nUSER
Bits [23:16] USER: User option byte (stored in FLASH_OBR[9:2])
This byte is used to configure the following features:
– Select the watchdog event: Hardware or software.
– Reset event when entering Stop mode.
– Reset event when entering Standby mode.
Note: Only bits [16:18] are used, bits [23:19]: 0x1F are not used.
Bit 18: nRST_STDBY
0: Reset generated when entering Standby mode.
1: No reset generated.
Bit 17: nRST_STOP
0: Reset generated when entering Stop mode
1: No reset generated
Bit 16: WDG_SW
0: Hardware watchdog
1: Software watchdog
Bits [15:8]: nRDP
Bits [7:0]: RDP: Read protection option byte
The read protection helps the user protect the software code stored in Flash
memory. It is activated by setting the RDP option byte.
When this option byte is programmed to a correct value (RDPRT key = 0x00A5),
read access to the Flash memory is allowed.
(The result of RDP level enabled/disabled is stored in FLASH_OBR[1].)
0x1FFF F804
Datax: Two bytes for user data storage.
These addresses can be programmed using the option byte programming
procedure.
Bits [31:24]: nData1
Bits [23:16]: Data1 (stored in FLASH_OBR[25:18])
Bits [15:8]: nData0
Bits [7:0]: Data0 (stored in FLASH_OBR[17:10])
0x1FFF F808
WRPx: Flash memory write protection option bytes
Bits [31:24]: nWRP1
Bits [23:16]: WRP1 (stored in FLASH_WRPR[15:8])
Bits [15:8]: nWRP0
Bits [7:0]: WRP0 (stored in FLASH_WRPR[7:0])

ST STM32F101xx series Specifications

General

Brand	ST
Model	STM32F101xx series
Category	Controller
Language	English