I
2
S general description AN2739
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Figure 2. I
2
S protocol signal description and configuration
1.2 STM32F103xx I
2
S feature presentation
The STM32F103xx implements the I
2
S feature as a mode included in the SPI peripheral.
The user has to choose either the SPI mode or the I
2
S mode (software configuration).
The STM32F103xx I
2
S is available in simplex mode only (receive-only or transmit-only), the
communication direction is configured by software.
The I
2
S peripheral supports four audio protocols (configurable by software):
● I
2
S Phillips protocol
● MSB protocol
● LSB protocol
● PCM protocol (including PCM Short and PCM Long)
It also supports most audio frequencies (8 kHz, 16 kHz, 22.05 kHz, 44.1 kHz, 48 kHz, etc.)
The data format is programmable to 16-, 24- or 32-bit data length (for each channel), MSB
first, and to 16- or 32-bit packet length (for each channel).
The WS signal assignment is managed by hardware and a relative flag (CHSIDE) is
available to monitor the channel side (for Phillips, MSB and LSB standards).
The I
2
S peripheral can be configured as the master or the slave in the audio communication.
The I
2
S generates its own clock (independent of the SPI clock used to interface registers to
the APB bus) using a 9-bit prescaler and designed to reach accurate audio frequencies
(8 kHz, 16 kHz, 22.05 kHz, 44.1 kHz, 48 kHz, etc.)
(a)
. When configured in master mode, the
peripheral is able to output an additional master clock (MCLK) at a fixed rate: 256 × F
S
(where F
S
is the audio frequency).
CK
WS
SD
ai15113
Transmitter Receiver
Transmitter = Master
CK
WS
SD
Transmitter Receiver
Receiver = Master
CK
WS
SD
Transmitter Receiver
Controller = Master
Controller
a. The sampling frequency is the bit clock frequency (CK) and is equal to:
F
S
× number of bits per channel × number of channels, where F
S
is the WS frequency in the Phillips, MSB and
LSB standards and, the WS/2 frequency in PCM mode.
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