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Supermicro SuperServer 6048R-TXR - Page 93

Supermicro SuperServer 6048R-TXR
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Chapter 7: BIOS
7-9
CPU C6 Report
Select Enable to allow the BIOS to report the CPU C6 State (ACPI C3) to the
operating system. During the CPU C6 State, the power to all cache is turned
off. The options are Enable and Disable.
Enhanced Halt State (C1E)
Select Enable to use Enhanced Halt-State technology, which will signicantly
reduce CPU power consumption by reducing CPU clock cycle and voltage during
a Halt-state. The options are Disable and Enable.
CPU T State Control
ACPI (Advanced Conguration Power Interface) T-States
Select Enable to support CPU throttling by the operating system to reduce power
consumption. The options are Enable and Disable.
Chipset Conguration
North Bridge
This feature allows the user to congure the following North Bridge settings.
IIO Conguration
EV DFX (Device Function On-Hide) Feature
When this feature is set to Enable, the EV_DFX Lock Bits that are located on a
processor will always remain clear during electric tuning. The options are Dis-
able and Enable.
IIO1 Conguration
IOU2 (IIO1 PCIe Port 1)
This item congures the PCI-E Bifuraction setting for a PCI-E port specied by
the user. The options are x4x4, X8, and Auto.
CPU1 SLOT3 PCI-E 3.0 x8 Link Speed
This item congures the link speed of a PCI-E port specied by the user. The
options are Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s),
and Gen 3 (Generation 3) (8 GT/s).

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