Tektronix FG 5010 User Manual

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the Driver Section , Q1322 , Q1212 , and Q1210 . The
MAGLATCH TRIGGER signal from the CPU enters the
board at P1110-8B , and is applied to pin 8 of U1234C . The
low state of the signal is the trigger for the Strobe Gener
ator , and must
be low for the
duration of the
Maglatch
trig
ger . The RESET signal from the Reset Circuit is applied
through Norgate U1234D , wired as an inverter to stop the
MAGLATCH
TRIGGER
during
warmup .
Otherwise , the out
put of U1234D is low , and the trigger can pass . The positive
trigger pulse from U1234C is applied as the trigger to one
shot U1232A ,
the Strobe
Generator
. It
responds by produc
ing
a pulse at
the output that
is no less
than 5 ms in
duration . The negative - going pulse from U1232A , pin 7 , is
applied to the emitter of Darlington transistor Q1322 ,
amplified , then taken from the collector and applied to driver
transistor Q1212 . This stage provides the current drive for
pass transistor Q1210 , which in turn produces the 5 ms
positive - going
MAGLATCH
STROBE signal
that drives the
relays
. If the
+5 V
supply fails , diode
CR1320 resets
the
output
by pulling
low on the
base of
Q1322 , and
holding it
low until the supply is restored .
Reset Circuit
This circuit consists of transistor array Q1330 , Q1320 ,
Zener diode
VR1432
, and
related
components
. The
purpose
of the circuit is to generate the RESET signal that prevents
the MAGLATCH STROBE signal from being produced until
power has stabilized , and to inform the CPU of power
status .
For discussion's sake , assume that the Power Module
and FG 5010 have both just been energized . This means
that neither the +8 V from the power module nor the +5 V
supply are
operating as
yet . The
power
signal
J1615
pin
1 is
low to indicate that the Power Module has not yet stabilized .
The
voltage
reference
output of
U1430 remains
at zero
until the +8 V supply reaches approximately 3 V. The refer
(
8
)
Theory
of
Operation - FG 5010
ence voltage stabilizes at +2.5 V by the time the +8 V sup
ply reaches +4.5 V. Until the reference voltage reaches one
diode drop ( for CR1331 ) , Q1330D conducts , diverting cur
rent from Q1330E and the RESET signal driver , Q1320 . To
cover this voltage range , Q1320 is turned on by current
through R1326 and R1327 as soon as the +5 V supply
reaches one diode drop . This current path continues to ap
ply the RESET signal until the +8 V supply reaches 5.1 V
plus one diode drop ( VR1432 in series with Q1330C ) . By the
time Q1330C conducts ( which effectively connects the junc
tion of R1326 and R1327 to ground ) , the voltage reference
will be stable and the differential amplifier ( Q1330D and
Q1330E ) will
be in
control .
If the PWR input is low or if the +5 V supply is below
regulating limits
,
Q1330E conducts
. The PWR
line pulls
down on the base of Q1330E through CR1331 , while the
+5
V supply is
sensed via R1332
and R1333
, and com
pared
with
the output
of
U1430 .
Transistors Q1330A and Q1330B form a latch that en
sures
that each
RESET
pulse
goes below
the TTL
low
threshold and remains
there for
at least ten
microseconds .
(
This
is
required
by the
microprocessor
. ) When
the
RESET
line is high , Q1330A is saturated , holding the emitter of
Q1330B near
ground . No
current flows
if the base
of
Q1330B is less than one diode drop above ground . If the
+5
V supply drops
out of
regulation ( or if the
PWR input
goes low
) , Q1330E
begins
to
conduct ,
turning on
Q1330B
and Q1320 . The collector of Q1330B pulls the base of
Q1330E lower
, increasing the
drive to
Q1330B and Q1320
.
When the RESET line falls below one diode drop , Q1330A
turns off
, removing
the
current
path
for
Q1330B
and
also
removing
the
regenerative
drive
from
Q1330E . If
the
condi
tion that caused the reset is still present , RESET will remain
low
. Once the
condition is
removed , the line
rises . This rise
is slowed by C1310 and R1310 to ensure that the pulse
arriving at the
CPU is more
than 10 μs
.
4-47

Tektronix FG 5010 Specifications

General

Brand	Tektronix
Model	FG 5010
Category	Portable Generator
Language	English