Texas Instruments 990 - Page 97

~~-~~--~--~~~-
~ 945424-9701
ROW
2
3
4
5
6
7
8
9
10
11
1 2
13
14
15
16
17
18
19
20
21
22
23
24
25 780
26
7DO
27
820
28 870
29 0co
30
910
31
960
ROW 32 980
(A)136302
BLANKED
AREA
CHAR 82 (HDSL)}
24 TH ROW (EVBL) VBL
LINE 9
VERT BLANKING
063
083
103
153
1A3
1F3
243
293
2E3
333
383
3D3
423
473
4C3
513
563
583
603
653
6A3
END
0
s~oJHZ
6F3 FRAME 60 HZ
7CF
START
VERTICAL SYNC
CHAR 82 (HDSL)
LINE 2
25TH ROW (EVSL)
}
VSL 8BF
90F
VERTICAL S~~gl
CHAR 82 \:'i~~L~f NVSGL
9
AF
95F
BLANKED AREA
50 HZ
D l2ill
START
VERTICAL SYNC}
CHAR 82 L~~~LJ VSL
27TH ROW (EVSL)
CHAR 82 (HDSL) NVSGL
END
VERTICAL SYNC }
28TH ROW
743
8D3
923
973
9C3
27TH ROW
CHAR 99
f~~€1)
END FRAME 50 HZ
LINE 3
32ND ROW
CHAR 99 (K99L)
Figure 1-53. Model 911VDT1920-Character Display Character
Address Counting Scheme
1-87
Digital Systems Division