D.1 F4xx/80-Pin Signal Mapping
F4xx/80-Pin Signal Mapping
Table D-1. F4xx/80-pin Signal Mapping
Connection Required
MSP430-TS430PZ100
F4xx/80-pin Signal F4xx/80-pin Pin Number Between Indicated Pins of
Pin Number
MSP430-TS430PZ100 Socket
DVcc1 1 1
P6.3/A3 2 2
P6.4/A4 3 3
P6.5/A5 4 4
P6.6/A6 5 5
P6.7/A7 6 6
VREF+ 7 7
XIN 8 8
XOUT 9 9
VeREF+ 10 10
VREF-/VeREF- 11 11
P5.1/S0 12 12
P5.0/S1 13 13
P4.7/S2 14 14 14-46
P4.6/S3 15 15 15-47
P4.5/S4 16 16 16-48
P4.4/S5 17 17 17-49
P4.3/S6 18 16 18-50
P4.2/S7 19 19 19-51
P4.1/S8 20 20 20-62
P4.0/S9 21 21 21-63
S10 22 22
S11 23 23
S12 24 24
S13 25 25
S14 26 26
S15 27 27
S16 28 28
S17 29 29
P2.7/ADC12CLK/S18 30 30
P2.6/CAOUT/S19 31 31
S20 32 32
S21 33 33
S22 34 34
S23 35 35
P3.7/S24 36 36 36-64
P3.6/S25 37 37 37-65
P3.5/S24 38 38 38-66
P3.4/S27 39 39 39-67
P3.3/UCLK0/S28 40 40 40-68
P3.2/SOMI0/S29 41 41 41-69
P3.1/SIMO0/S30 42 42 42-70
70 80-Pin MSP430F44x and MSP430F43x Device Emulation SLAU138F – June 2004 – Revised March 2007
Submit Documentation Feedback
To Next Page
Loading...
Need help?
General
