Inter-Integrated Circuit (I2C)
12.2.1.11 ROM_I2CMasterIntClearEx
Clears I2C Master interrupt sources.
Prototype:
void
ROM_I2CMasterIntClearEx(uint32_t ui32Base,
uint32_t ui32IntFlags)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_I2CTABLE is an array of pointers located at ROM_APITABLE[3].
ROM_I2CMasterIntClearEx is a function pointer located at ROM_I2CTABLE[32].
Parameters:
ui32Base is the base address of the I2C Master module.
ui32IntFlags is a bit mask of the interrupt sources to be cleared.
Description:
The specified I2C Master interrupt sources are cleared, so that they no longer assert. This
must be done in the interrupt handler to keep it from being called again immediately upon exit.
The ui32IntFlags parameter has the same definition as the ui32IntFlags parameter to
I2CMasterIntEnableEx().
Note:
Because there is a write buffer in the Cortex-M4 processor, it may take several clock cycles
before the interrupt source is actually cleared. Therefore, it is recommended that the interrupt
source be cleared early in the interrupt handler (as opposed to the very last action) to avoid
returning from the interrupt handler before the interrupt source is actually cleared. Failure to
do so may result in the interrupt handler being immediately reentered (because the interrupt
controller still sees the interrupt source asserted).
Returns:
None.
12.2.1.12 ROM_I2CMasterIntDisable
Disables the I2C Master interrupt.
Prototype:
void
ROM_I2CMasterIntDisable(uint32_t ui32Base)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_I2CTABLE is an array of pointers located at ROM_APITABLE[3].
ROM_I2CMasterIntDisable is a function pointer located at ROM_I2CTABLE[9].
Parameters:
ui32Base is the base address of the I2C Master module.
Description:
Disables the I2C Master interrupt source.
130 April 8, 2013
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