System Control
SYSCTL_XTAL_16MHZ, or SYSCTL_XTAL_16_3MHZ. Values below
SYSCTL_XTAL_3_57MHZ are not valid when the PLL is in operation.
The oscillator source is chosen with one of the following values: SYSCTL_OSC_MAIN,
SYSCTL_OSC_INT, SYSCTL_OSC_INT4, SYSCTL_OSC_EXT32, or SYSCTL_OSC_INT30.
SYSCTL_OSC_EXT32 is only available when the hibernate module has been enabled.
The internal and main oscillators are disabled with the SYSCTL_INT_OSC_DIS and
SYSCTL_MAIN_OSC_DIS flags, respectively. The external oscillator must be enabled in order
to use an external clock source. Note that attempts to disable the oscillator used to clock the
device is prevented by the hardware.
To clock the system from an external source (such as an external crystal oscillator), use
SYSCTL_USE_OSC | SYSCTL_OSC_MAIN. To clock the system from the main oscillator,
use SYSCTL_USE_OSC | SYSCTL_OSC_MAIN. To clock the system from the PLL, use
SYSCTL_USE_PLL | SYSCTL_OSC_MAIN, and select the appropriate crystal with one of
the SYSCTL_XTAL_xxx values.
Note:
If selecting the PLL as the system clock source (that is, via SYSCTL_USE_PLL), this function
will poll the PLL lock interrupt to determine when the PLL has locked. If an interrupt handler
for the system control interrupt is in place, and it responds to and clears the PLL lock interrupt,
this function will delay until its timeout has occurred instead of completing as soon as PLL lock
is achieved.
Returns:
None.
18.2.1.5 ROM_SysCtlDeepSleep
Puts the processor into deep-sleep mode.
Prototype:
void
ROM_SysCtlDeepSleep(void)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_SYSCTLTABLE is an array of pointers located at ROM_APITABLE[13].
ROM_SysCtlDeepSleep is a function pointer located at ROM_SYSCTLTABLE[20].
Description:
This function places the processor into deep-sleep mode; it will not return un-
til the processor returns to run mode. The peripherals that are enabled via
ROM_SysCtlPeripheralDeepSleepEnable() continue to operate and can wake up the proces-
sor (if automatic clock gating is enabled with ROM_SysCtlPeripheralClockGating(), otherwise
all peripherals continue to operate).
Returns:
None.
April 8, 2013 201
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