System Control
ROM_SysCtlPeripheralSleepEnable is a function pointer located at
ROM_SYSCTLTABLE[8].
Parameters:
ui32Peripheral is the peripheral to enable in sleep mode.
Description:
This function allows a peripheral to continue operating when the processor goes into sleep
mode. Since the clocking configuration of the device does not change, any peripheral can
safely continue operating while the processor is in sleep mode, and can therefore wake the
processor from sleep mode.
Sleep mode clocking of peripherals must be enabled via ROM_SysCtlPeripheralClockGating();
if disabled, the peripheral sleep mode configuration is maintained but has no effect when sleep
mode is entered.
The ui32Peripheral parameter must be only one of the follow-
ing values: SYSCTL_PERIPH_ADC0, SYSCTL_PERIPH_ADC1,
SYSCTL_PERIPH_CAN0, SYSCTL_PERIPH_CAN1, SYSCTL_PERIPH_CAN2,
SYSCTL_PERIPH_COMP0, SYSCTL_PERIPH_COMP1, SYSCTL_PERIPH_COMP2,
SYSCTL_PERIPH_EEPROM0, SYSCTL_PERIPH_GPIOA, SYSCTL_PERIPH_GPIOB,
SYSCTL_PERIPH_GPIOC, SYSCTL_PERIPH_GPIOD, SYSCTL_PERIPH_GPIOE,
SYSCTL_PERIPH_GPIOF, SYSCTL_PERIPH_HIBERNATE, SYSCTL_PERIPH_I2C0,
SYSCTL_PERIPH_I2C1, SYSCTL_PERIPH_I2C2, SYSCTL_PERIPH_I2C3,
SYSCTL_PERIPH_I2C4, SYSCTL_PERIPH_I2C5, SYSCTL_PERIPH_PWM0,
SYSCTL_PERIPH_PWM1, SYSCTL_PERIPH_QEI0, SYSCTL_PERIPH_QEI1,
SYSCTL_PERIPH_SSI0, SYSCTL_PERIPH_SSI1, SYSCTL_PERIPH_SSI2,
SYSCTL_PERIPH_SSI3, SYSCTL_PERIPH_TIMER0, SYSCTL_PERIPH_TIMER1,
SYSCTL_PERIPH_TIMER2, SYSCTL_PERIPH_TIMER3, SYSCTL_PERIPH_TIMER4,
SYSCTL_PERIPH_TIMER5, SYSCTL_PERIPH_UART0, SYSCTL_PERIPH_UART1,
SYSCTL_PERIPH_UART2, SYSCTL_PERIPH_UART3, SYSCTL_PERIPH_UART4,
SYSCTL_PERIPH_UART5, SYSCTL_PERIPH_UART6, SYSCTL_PERIPH_UART7,
SYSCTL_PERIPH_UDMA, SYSCTL_PERIPH_USB0, SYSCTL_PERIPH_WDOG0,
SYSCTL_PERIPH_WDOG1, SYSCTL_PERIPH_WTIMER0, SYSCTL_PERIPH_WTIMER1,
SYSCTL_PERIPH_WTIMER2, SYSCTL_PERIPH_WTIMER3,
SYSCTL_PERIPH_WTIMER4, or SYSCTL_PERIPH_WTIMER5.
Returns:
None.
18.2.1.26 ROM_SysCtlPIOSCCalibrate
Calibrates the precision internal oscillator.
Prototype:
uint32_t
ROM_SysCtlPIOSCCalibrate(uint32_t ui32Type)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_SYSCTLTABLE is an array of pointers located at ROM_APITABLE[13].
ROM_SysCtlPIOSCCalibrate is a function pointer located at ROM_SYSCTLTABLE[45].
216 April 8, 2013