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Texas Instruments Tiva TM4C123GH6PM User Manual

Texas Instruments Tiva TM4C123GH6PM
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System Control
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_SYSCTLTABLE is an array of pointers located at ROM_APITABLE[13].
ROM_SysCtlPWMClockSet is a function pointer located at ROM_SYSCTLTABLE[25].
Parameters:
ui32Config is the configuration for the PWM clock; it must be one of SYSCTL_PWMDIV_1,
SYSCTL_PWMDIV_2, SYSCTL_PWMDIV_4, SYSCTL_PWMDIV_8,
SYSCTL_PWMDIV_16, SYSCTL_PWMDIV_32, or SYSCTL_PWMDIV_64.
Description:
This function sets the rate of the clock provided to the PWM module as a ratio of the processor
clock. This clock is used by the PWM module to generate PWM signals; its rate forms the basis
for all PWM signals.
Note:
The clocking of the PWM is dependent upon the system clock rate as configured by
ROM_SysCtlClockSet().
Returns:
None.
18.2.1.29 ROM_SysCtlReset
Resets the device.
Prototype:
void
ROM_SysCtlReset(void)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_SYSCTLTABLE is an array of pointers located at ROM_APITABLE[13].
ROM_SysCtlReset is a function pointer located at ROM_SYSCTLTABLE[19].
Description:
This function will perform a software reset of the entire device. The processor and all peripher-
als are reset and all device registers will return to their default values (with the exception of the
reset cause register, which will maintain its current value but have the software reset bit set as
well).
Returns:
This function does not return.
18.2.1.30 ROM_SysCtlResetCauseClear
Clears reset reasons.
Prototype:
void
ROM_SysCtlResetCauseClear(uint32_t ui32Causes)
218 April 8, 2013
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Texas Instruments Tiva TM4C123GH6PM Specifications

General IconGeneral
CoreARM Cortex-M4F
Clock Speed80 MHz
Flash Memory256 KB
SRAM32 KB
GPIO Pins43
UART8
I2C2
SPI/SSI4
USBUSB 2.0
Timers6
Communication InterfacesUART, I2C, SPI, USB
Operating Temperature-40°C to 85°C
PackageLQFP64

Summary

Boot Loader

Introduction

Explains the ROM-based boot loader and its interfaces for flash updates.

Serial Interfaces

Details the UART, SSI, and I2C interfaces used by the boot loader.

USB Interface

Describes the USB boot loader functionality using the DFU protocol.

Controller Area Network (CAN)

Flash

GPIO

Hibernation Module

Inter-Integrated Circuit (I2C)

Interrupt Controller (NVIC)

Memory Protection Unit (MPU)

Pulse Width Modulator (PWM)

Synchronous Serial Interface (SSI)

System Control

Timer

UART

uDMA Controller

USB Controller

Watchdog Timer

Functions

Lists and describes API functions for watchdog timer configuration, interrupts, and lock mechanism.

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