Usage Notes and Known Design Exceptions to Functional Specifications
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10
SPRZ412K–December 2013–Revised February 2020
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Copyright © 2013–2020, Texas Instruments Incorporated
TMS320F2837xD Dual-Core MCUs Silicon Revisions C, B, A, 0
Advisory ADC: ADC Post-Processing Block Limit Compare
Revision(s) Affected 0, A, B, C
Details When using a non-zero offset reference in the ADC post-processing block (PPB), the
resultant ADCPPBxRESULT can be signed. TRIPHI or TRIPLO limit compares do not
function correctly with this result if it is signed.
Workaround(s) When using the TRIPHI or TRIPLO limit compares, leave the offset reference as zero.
The offset reference (and zero compare) can be used as long as the limit compares are
disabled.
If the limit compares, the offset reference, and the zero-crossing compare are to be used
at the same time, then two PPBs can be used. Both PPBs should be configured to use
the same SOC. One PPB can implement the TRIPHI and/or TRIPLO limit compares
while the other can implement offset reference subtraction and zero-crossing detection.
Advisory ADC: Interrupts may Stop if INTxCONT (Continue-to-Interrupt Mode) is not Set
Revision(s) Affected 0, A, B, C
Details If ADCINTSELxNx[INTxCONT] = 0, then interrupts will stop when the ADCINTFLG is set
and no additional ADC interrupts will occur.
When an ADC interrupt occurs simultaneously with a software write of the
ADCINTFLGCLR register, the ADCINTFLG will unexpectedly remain set, blocking future
ADC interrupts.
Workaround(s)
1. Use Continue-to-Interrupt Mode to prevent the ADCINTFLG from blocking additional
ADC interrupts:
ADCINTSEL1N2[INT1CONT] = 1;
ADCINTSEL1N2[INT2CONT] = 1;
ADCINTSEL3N4[INT3CONT] = 1;
ADCINTSEL3N4[INT4CONT] = 1;
2. Ensure there is always sufficient time to service the ADC ISR and clear the
ADCINTFLG before the next ADC interrupt occurs to avoid this condition.
3. Check for an overflow condition in the ISR when clearing the ADCINTFLG. Check
ADCINTOVF immediately after writing to ADCINTFLGCLR; if it is set, then write
ADCINTFLGCLR a second time to ensure the ADCINTFLG is cleared. The
ADCINTOVF register will be set, indicating an ADC conversion interrupt was lost.
AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag
if(1 == AdcaRegs.ADCINTOVF.bit.ADCINT1) //ADCINT overflow
{
AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 again
// If the ADCINTOVF condition will be ignored by the application
// then clear the flag here by writing 1 to ADCINTOVFCLR.
// If there is a ADCINTOVF handling routine, then either insert
// that code and clear the ADCINTOVF flag here or do not clear
// the ADCINTOVF here so the external routine will detect the
// condition.
// AdcaRegs.ADCINTOVFCLR.bit.ADCINT1 = 1; // clear OVF
}
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