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Texas Instruments AM5728 User Manual

Texas Instruments AM5728
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AM571x Industrial Development Kit (IDK)
Evaluation Module (EVM) Hardware
User's Guide
Literature Number: SPRUI97D
May 2017Revised September 2019

Table of Contents

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Texas Instruments AM5728 Specifications

General IconGeneral
Processor ArchitectureARM Cortex-A15, ARM Cortex-M4
GPUPowerVR SGX544
Ethernet2x Gigabit Ethernet
Clock SpeedUp to 1.5 GHz (Cortex-A15)
RAM ControllersDDR3/DDR3L
StorageNAND, eMMC
USBUSB 2.0
Operating Temperature-40°C to 105°C
Display InterfaceHDMI

Summary

Introduction

1.1 Description

Describes the AM571x IDK as a development module for industrial applications.

1.2 System View

Describes the main board, camera board, and optional LCD/touch screen.

Functional Description

2.1 Processor

Details the AM5718 processor as the central processing unit for the IDK.

2.2 Clocks

Explains the main clock source derived from a 20-MHz crystal.

2.3 Reset Signals

Describes the processor's reset inputs (PORz, RESETn) and output (RSTOUTn).

Power Supplies

3.1 Power Source

Details the external 5V power supply input and connector.

3.2 TPS6590377 PMIC

Explains the PMIC's role in power sequencing and supply voltages.

3.3 AVS Control

Describes Adaptive Voltage Scaling for power optimization.

3.4 Other Power Supplies

Lists other power conversion devices supporting interfaces and memory.

Configuration/Setup

4.1 Boot Configuration

Explains setting boot configurations using SYSBOOT pins.

4.2 I2C Address Assignments

Lists I2C slave device addresses to prevent contention.

4.3 SEEPROM Header

Details the SEEPROM structure for serial number and board details.

4.4 JTAG Emulation

Describes support for embedded XDS100V2 USB and CTI JTAG connectors.

Memories Supported

5.1 DDR3L SDRAM

Details the single bank of DDR3L SDRAM attached to the EMIF.

5.2 SPI NOR Flash

Describes the 256Mbit SPI Flash memory connected to the QSPI port.

5.3 Board Identity Memory

Explains the EEPROM for storing board-specific data and version.

5.4 SD/MMC

Describes the MicroSD connector for memory card storage.

5.5 eMMC NAND Flash

Details the eMMC memory devices supported by the MMC2 port.

Ethernet Ports

6.1 100Mb Ethernet Ports on PRU-ICSS

Describes the four 100Mb Ethernet ports connected to PRU-ICSS.

6.2 Gigabit (1000Mb) Ethernet Ports

Details the two Gigabit Ethernet ports connected to the switch block.

USB Ports

7.1 Processor USB Port 1

Describes Processor USB Port 1, implemented as a USB host.

7.2 Processor USB Port 2

Describes Processor USB Port 2, functioning as host or device.

7.3 FTDI USB Port

Details the FTDI USB port for JTAG emulation and UART console.

PCle

Video Input and Output

9.1 Camera

Describes the camera header for attaching a camera module.

9.2 HDMI

Details the HDMI connector for video output.

9.3 LCD

Explains the optional LCD panel support and MIPI conversion.

Industrial Interfaces

10.1 Profibus

Describes the compliant Profibus interface using ISO1176T.

10.2 DCAN

Details the two Controller Area Network (DCAN) interfaces.

10.3 RS-485

Explains the RS-485 interface using SN65HVD78D transceiver.

User Interfaces

11.1 Tri-color LEDs

Describes the 6 tri-color LEDs connected to SOC GPIO pins.

11.2 Industrial Inputs

Details the SN65HVS882 for industrial 24v digital inputs.

11.3 Industrial Outputs / LEDs

Explains the I2C driver for eight industrial output LEDs.

Pin Use Description

12.1 Functional Interface Mapping

Explains how signals connect to fixed or profile-based devices.

12.2 GPIO Pin Mapping

Describes enabling and defining GPIO pins for various uses.

Board Connectors

EVM Important Notice

Appendix A Known Deficiencies in AM571x IDK EVM

A.1 Power solution not sufficient for full PCle plug-in card compliance

Notes insufficient power for PCIe x4 cards and lack of hot-plug support.

A.3 AM571x IDK EVM does not support eMMC HS200 mode

Explains the fixed 3.3V interface voltage prevents eMMC HS200 mode.

A.4 PCIe PERSTn line not in proper state at start-up

Describes PERSTn line state issue affecting PCIe link training.

A.5 EDIO connectors J4 and J7 should support real-time debugging for both PRU1 and PRU2

Notes the chosen pins provide visibility to PRU ports for debugging.

A.6 HDQ implementation not correct

Points out an incorrect HDQ implementation due to pin multiplexing.

A.8 Software shutdown of PMIC not operational

Explains that the PMIC design prevents software shutdown.

A.9 CCS System Reset fails

Describes CCS system reset failures due to a reset erratum.

A.10 AM571x IDK EVM design contains 2 clamp circuits that may not be necessary

Discusses potentially superfluous clamp circuits in the design.

A.11 Crystal connected to osc0 needs to have 50ppm or better long term accuracy

Specifies the required accuracy for the crystal used for Ethernet clocks.

A.12 Software must program the CDCE913 for 0pf load capacitance

Instructs on programming CDCE913 for proper crystal operation.

A.13 Protection diode D2 should be rated for 5V

Identifies an incorrect protection diode rating and suggests replacement.

A.14 PHY address LSB for U9 and U15 can be latched incorrectly

Explains an issue with incorrect PHY address latching and workaround.

A.15 3.3-V clamp circuit needs more margin

Suggests adjusting a clamp circuit for better tolerance.

A.16 Current PMIC does not provide the mandated power down sequence

Notes the PMIC's inability to perform the mandated power-down sequence.

A.17 Power supply droop may cause board reset

Warns that power supply droop can trigger unexpected resets.

A.18 AM5718 pin N21 must be connected to 1.8 V, as it is VDDS18V_DDR1 and not N/C

Identifies an incorrect labeling of pin N21 on the schematic.

A.19 VOUT1 is used at 3.3 V, which violates erratum i920

States VOUT1 usage at 3.3V violates erratum i920, impacting reliability.

A.20 PMIC OSC16MCAP pin mistakenly grounded

Notes the OSC16MCAP pin is grounded, potentially damaging the PMIC.

Revision History

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