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Processor Architecture | ARM Cortex-A15, ARM Cortex-M4 |
---|---|
GPU | PowerVR SGX544 |
Ethernet | 2x Gigabit Ethernet |
Clock Speed | Up to 1.5 GHz (Cortex-A15) |
RAM Controllers | DDR3/DDR3L |
Storage | NAND, eMMC |
USB | USB 2.0 |
Operating Temperature | -40°C to 105°C |
Display Interface | HDMI |
Describes the AM571x IDK as a development module for industrial applications.
Describes the main board, camera board, and optional LCD/touch screen.
Details the AM5718 processor as the central processing unit for the IDK.
Explains the main clock source derived from a 20-MHz crystal.
Describes the processor's reset inputs (PORz, RESETn) and output (RSTOUTn).
Details the external 5V power supply input and connector.
Explains the PMIC's role in power sequencing and supply voltages.
Describes Adaptive Voltage Scaling for power optimization.
Lists other power conversion devices supporting interfaces and memory.
Explains setting boot configurations using SYSBOOT pins.
Lists I2C slave device addresses to prevent contention.
Details the SEEPROM structure for serial number and board details.
Describes support for embedded XDS100V2 USB and CTI JTAG connectors.
Details the single bank of DDR3L SDRAM attached to the EMIF.
Describes the 256Mbit SPI Flash memory connected to the QSPI port.
Explains the EEPROM for storing board-specific data and version.
Describes the MicroSD connector for memory card storage.
Details the eMMC memory devices supported by the MMC2 port.
Describes the four 100Mb Ethernet ports connected to PRU-ICSS.
Details the two Gigabit Ethernet ports connected to the switch block.
Describes Processor USB Port 1, implemented as a USB host.
Describes Processor USB Port 2, functioning as host or device.
Details the FTDI USB port for JTAG emulation and UART console.
Describes the camera header for attaching a camera module.
Details the HDMI connector for video output.
Explains the optional LCD panel support and MIPI conversion.
Describes the compliant Profibus interface using ISO1176T.
Details the two Controller Area Network (DCAN) interfaces.
Explains the RS-485 interface using SN65HVD78D transceiver.
Describes the 6 tri-color LEDs connected to SOC GPIO pins.
Details the SN65HVS882 for industrial 24v digital inputs.
Explains the I2C driver for eight industrial output LEDs.
Explains how signals connect to fixed or profile-based devices.
Describes enabling and defining GPIO pins for various uses.
Notes insufficient power for PCIe x4 cards and lack of hot-plug support.
Mentions a deficiency in early EVM versions regarding temperature ratings.
Explains the fixed 3.3V interface voltage prevents eMMC HS200 mode.
Describes PERSTn line state issue affecting PCIe link training.
Notes the chosen pins provide visibility to PRU ports for debugging.
Points out an incorrect HDQ implementation due to pin multiplexing.
Warns about potential damage from improper power cycling.
Explains that the PMIC design prevents software shutdown.
Describes CCS system reset failures due to a reset erratum.
Discusses potentially superfluous clamp circuits in the design.
Specifies the required accuracy for the crystal used for Ethernet clocks.
Instructs on programming CDCE913 for proper crystal operation.
Identifies an incorrect protection diode rating and suggests replacement.
Explains an issue with incorrect PHY address latching and workaround.
Suggests adjusting a clamp circuit for better tolerance.
Notes the PMIC's inability to perform the mandated power-down sequence.
Warns that power supply droop can trigger unexpected resets.
Identifies an incorrect labeling of pin N21 on the schematic.
States VOUT1 usage at 3.3V violates erratum i920, impacting reliability.
Notes the OSC16MCAP pin is grounded, potentially damaging the PMIC.