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Usage Notes and Known Design Exceptions to Functional Specifications
19
SPRZ412K–December 2013–Revised February 2020
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TMS320F2837xD Dual-Core MCUs Silicon Revisions C, B, A, 0
Advisory ePIE: Spurious VCU Interrupt (ePIE 12.6) Can Occur When First Enabled
Revision(s) Affected 0, A, B
Details The VCU-II can power up in a state which incorrectly sets the VCU VSTATUS[DIVE]
error bit and, subsequently PIEIFR12[INTx6], when the CPU is released from reset.
When the VCU interrupt enable PIEIER12[INTx6] is enabled for the first time by the
application, a spurious interrupt can occur due to the erroneous pending interrupt.
Workaround(s) Before enabling VCU interrupt 12.6, execute the following instructions to avoid the
spurious interrupt.
// Clear VCU divide by zero status
asm(" VCLRDIVE");
// Clear PIE interrupt for VCU
PieCtrlRegs.PIEIFR12.bit.INTx6 = 0;
Beginning with revision C silicon, the Boot ROM will perform the above workaround
before branching to the application.
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