Usage Notes and Known Design Exceptions to Functional Specifications
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SPRZ412K–December 2013–Revised February 2020
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Copyright © 2013–2020, Texas Instruments Incorporated
TMS320F2837xD Dual-Core MCUs Silicon Revisions C, B, A, 0
Advisory SDFM: Comparator Filter Module may Generate Spurious Over-Value and Under-
Value Conditions
Revision(s) Affected 0, A, B, C
Details When interrupts are enabled in the SDFM comparator module, it may trigger spurious
over-value (SDIFLG.IEHx, x = 1 to 4) or under-value (SDIFLG.IELx, x = 1 to 4)
conditions. These are depicted as IELx and IEHx interrupt outputs in the “Block Diagram
of One Filter Module” figure in the TMS320F2837xD Dual-Core Microcontrollers
Technical Reference Manual.
Workaround(s) For silicon revisions 0 and A – Disable SDFM comparator interrupt sources to avoid
spurious events.
For future silicon revisions – These erroneous interrupts can be eliminated by
implementing the following workaround:
• Comparator OSR (COSR) value should be greater than or equal to 5.
• After changing COSR, wait for at least latency of comparator filter and 5 SD-Cx
cycles before enabling comparator interrupts SDCPARMx.IEH and SDCPARMx.IEL.
Advisory SDFM: Dynamically Changing Threshold Settings (LLT, HLT), Filter Type, or COSR
Settings Will Trigger Spurious Comparator Events
Revision(s) Affected 0, A, B, C
Details When SDFM comparator settings—such as filter type, lower/upper threshold, or
comparator OSR (COSR) settings—are dynamically changed during run time, spurious
comparator events will be triggered. The spurious comparator event will trigger a
corresponding CPU interrupt, CLA task, ePWM X-BAR events, and GPIO output X-BAR
events if configured appropriately.
Workaround(s) When comparator settings need to be changed dynamically, follow the procedure below
to ensure spurious comparator events do not generate a CPU interrupt or CLA task:
1. Disable the SDFM comparator interrupt.
2. Change comparator settings such as lower/upper threshold, filter type, or COSR.
3. COSR value should be greater than or equal to 5.
4. Delay for at least a latency of comparator filter + 5 SD-Cx clock cycles.
5. Enable the SDFM comparator interrupt.
When comparator settings need to be changed dynamically, follow the procedure below
to ensure spurious comparator events do not trigger X-BAR events (ePWM X-BAR and
GPIO output X-BAR events):
1. Disable the SDFM X-BAR trip events in the corresponding X-BAR registers (ePWM
X-BAR or GPIO X-BAR event).
2. Change comparator settings such as lower/upper threshold, filter type, or COSR.
3. COSR value should be greater than or equal to 5.
4. Delay for at least a latency of comparator filter + 5 SD-Cx clock cycles.
5. Enable the SDFM X-BAR trip events in the corresponding X-BAR registers (ePWM X-
BAR or GPIO X-BAR event).
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