TECHNICAL DATA
47
3.8 CONTROL AND MONITORING
— Synchrocheck - 25
Common configuration:
Operating mode (25 Logic)
1
0,1,2
Minimum stabilization time (t
STAB
)
2
0.10...10.00 s (step 0.01 s)
CB closing time (t
CB-CLOSE
)
3
0.02...0.60 s (step 0.01 s)
Time out paralleling sequence (timeout
-SYNC
)
4
1...20 min (step 1 min)
Synchro time delay (t
SYNC
)
5
0.00...60.0 s (step 0.1 s)
0.00...9.99 s (step 0.01 s)
10.0...60.0 s (step 0.1 s)
Maximum voltage threshold (V
MAX-SYNC
)
6
0.50...1.50 U
n
/E
n
/U
n2
(step 0.01 U
n
/E
n
/U
n2
)
Minimum voltage threshold (V
min-SYNC
)
7
0.20...1.50 U
n
/E
n
/U
n2
(step 0.01 U
n
/E
n
/U
n2
)
Allowed frequency range for V1, V2 (f
RANGE
)
8
f
n
±0.5...3.0 Hz (step 0.1 Hz)
Consistency of frequency measurement (Rof>
-SYNC
)
9
0.00...0.60 Hz (step 0.05 Hz)
Setpoints
Frequency gap fV1 fV2 for sync-async grids (df-
GRID
)
10
0.01...0.04 Hz (step 0.01 Hz)
Frequency deviation with fV1>fV2 (df12
-SYNC
) 0.02...0.50 Hz (step 0.01 Hz)
Frequency deviation with fV2>fV1 (df21
-SYNC
) 0.02...0.50 Hz (step 0.01 Hz)
Voltage deviation with V1>V2 (dV12
-SYNC
) 0.01...0.30 U
n
/E
n
/U
n2
(step 0.01 U
n
/E
n
/U
n2
)
Voltage deviation with V2>V1 (dV21
-SYNC
) 0.01...0.30 U
n
/E
n
/U
n2
(step 0.01 U
n
/E
n
/U
n2
)
Phase deviation with V1 lag behind V2 (dp12
-SYNC
) 2...30 ° (step 1 °)
Phase deviation with V2 lag behind V1 (dp21
-SYNC
) 2...30 ° (step 1 °)
V1 voltage presence threshold (V
1
>
SYNC
) 0.50...1.50 U
n
/E
n
(step 0.01 U
n
/E
n
)
Minimum time for V1 voltage presence (t
V1
>
SYNC
) 0.00...10.00 s (step 0.01 s)
V2 voltage presence threshold (V
2
>
SYNC
) 0.50...1.50 U
n2
(step 0.01 U
n2
)
Minimum time for V2 voltage presence (t
V2
>
SYNC
) 0.00...10.00 s (step 0.01 s)
V1 voltage absence threshold (V
1
<
SYNC
) 0.05...0.60 U
n
/E
n
(step 0.01 U
n
/E
n
)
Minimum time for V1 voltage absence (t
V1
<
SYNC
) .00...10.00 s (step 0.01 s)
V2 voltage absence threshold (V
2
<
SYNC
) 0.05...0.60 U
n2
(step 0.01 U
n2
)
Minimum time for V2 voltage absence (t
V2
<
SYNC
) 0.00...10.00 s (step 0.01 s)
25 Trip time delayed timer (t
Trip25 delayed
) 0.00...10.00 s (step 0.01 s)
0.00...10.00 s (step 0.01 s)
— Fault locator
Internal or external trip FL trigger (FL-TRG-TR, FL-TRG-EXT ) OFF-ON
Settings:
11
Positive sequence resistance of the line (R
1L
) 0.05...200 mZ
NF
/km
0.05...0.99 (step 0.01 mZ
NF
/km)
1.0...9.9 (step 0.1 mZ
NF
/km)
10...200 (step 1 mZ
NF
/km)
Positive sequence reactance of the line (X
1L
) 0.05...200 mZ
NF
/km
0.05...0.99 (step 0.01 mZ
NF
/km)
1.0...9.9 (step 0.1 mZ
NF
/km)
10...200 (step 1 mZ
NF
/km)
Zero sequence resistance of the line (R
0L
) 0.05...200 mZ
NF
/km
0.05...0.99 (step 0.01 mZ
NF
/km)
1.0...9.9 (step 0.1 mZ
NF
/km)
10...200 (step 1 mZ
NF
/km)
Zero sequence reactance of the line (X
0L
) 0.05...200 mZ
NF
/km
0.05...0.99 (step 0.01 mZ
NF
/km)
1.0...9.9 (step 0.1 mZ
NF
/km)
10...200 (step 1 mZ
NF
/km)
Line length (L
) 0.1...1000.0 km (step 0.1 km)
— Second harmonic restraint - 2ndh-REST
Second harmonic restraint threshold (I
2ndh
>) 10...50 % (step 1 %)
Reset time delay (t
2ndh>RES)
0...100.0 s
0.00...9.99 s (step 0.01 s)
10.0...100.0 s (step 0.1 s)
Pickup time ≤ 0.04 s
Dropout ratio 0.95...0.98
Dropout time ≤ 0.05 s
Overshoot time 0.04 s
Pickup accuracy I
2ndh
> ± 1% with 0.1 I
n
± 0.5% with 1 I
n
Operate time accuracy 5% ± 10 ms
— Trip Circuit Supervision - 74TCS
Operate time:
• One binary input supervision 40 s
• Two binary inputs supervision 2 s
Reset time delay:
• One binary input supervision 6 s
Note 11 Maximum difference in frequency with which the systems are classified as synchronous
XMR-D EQUIPMENT MANUAL
Ed. 2.9 - 02/2021
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