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Ublox SARA-R5 Series - Page 12

Ublox SARA-R5 Series
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SARA-R5 series - System integration manual
UBX-19041356 - R04 System description Page 12 of 118
C1-Public
Function
Pin name
Pin no.
I/O
Description
Remarks
UART
RXD
13
O
UART data output
USIO variants 0 / 1 / 2 / 3 / 4:
Primary UART circuit 104 (RxD) in ITU-T V.24, for AT, data,
Mux, FOAT, FW update via u-blox EasyFlash tool.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
Provide test point for FW update purposes.
TXD
12
I
UART data input
USIO variants 0 / 1 / 2 / 3 / 4:
Primary UART circuit 103 (TxD) in ITU-T V.24, for AT, data,
Mux, FOAT, FW update via u-blox EasyFlash tool.
Internal active pull-up enabled.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
Provide test point for FW update purposes.
CTS
11
O
UART clear to send
output
USIO variants 0 / 1 / 2 / 3 / 4:
Primary UART circuit 106 (CTS) in ITU-T V.24.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
RTS
10
I
UART request to
send input
USIO variants 0 / 1 / 2 / 3 / 4:
Primary UART circuit 105 (RTS) in ITU-T V.24.
Internal active pull-up enabled.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
DSR
6
O/I
UART data set
ready output /
AUX UART request
to send input
USIO variant 0:
Pin disabled
USIO variant 1:
Primary UART circuit 107 (DSR) in ITU-T V.24.
USIO variants 2 / 3 / 4:
Auxiliary UART circuit 105 (RTS) in ITU-T V.24.
Internal active pull-up enabled.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
RI
7
O
UART ring indicator
output /
AUX UART clear to
send output
USIO variants 0 / 1:
Primary UART circuit 125 (RI) in ITU-T V.24.
USIO variants 2 / 3 / 4:
Auxiliary UART circuit 106 (CTS) in ITU-T V.24.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
DTR
9
I
UART data terminal
ready input /
AUX UART data
input
USIO variants 0 / 1:
Primary UART circuit 108/2 (DTR) in ITU-T V.24.
Internal active pull-up enabled.
USIO variants 2 / 3 / 4:
Auxiliary UART circuit 103 (TxD) in ITU-T V.24, for AT, data,
GNSS tunneling, FOAT, diagnostics.
Internal active pull-up enabled.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
Provide test point for diagnostic purposes.
DCD
8
O
UART data carrier
detect output /
AUX UART data
output
USIO variant 0:
Pin disabled.
USIO variant 1:
Primary UART circuit 109 (DCD) in ITU-T V.24.
USIO variants 2 / 3 / 4:
Auxiliary UART circuit 104 (RxD) in ITU-T V.24, for AT, data,
GNSS tunneling, FOAT, diagnostics.
See section 1.9.1 for functional description.
See section 2.6.1 for external circuit design-in.
Provide test point for diagnostic purposes.

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