VIA Technologies P4M890 User Manual

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3-6-2 AGP & P2P Bridge Control
CMOS Setup Utility – Copyright(C) 1984-2004 Award Software
AGP Timing Settings
Item Help
AGP Aperture Size 128M
AGP 2.0 Mode 4X
AGP Master 1 WS Write Enabled
AGP Master 1 WS Read Enabled
VGA Share Memory Size 64M------
Direct Frame Buffer Disabled
Menu Level >>
↑↓→←
Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5:Previous Values F6:Optimized Defaults F7:Standard Defaults
Note: Change these settings only if you are familiar with the chipset.
3-6-3 CPU&PCI Bus Control
CMOS Setup Utility – Copyright(C) 1984-2004 Award Software
PCI Timing Settings
Item Help
PCI Master 0 WS Write Disabled
PCI Delay Transaction Disabled
VLink Mode Selection By Auto
VLink 8X Support Enabled
VIA PWR Management Enabled
Menu Level >>
↑↓→←
Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5:Previous Values F6:Optimized Defaults F7:Standard Defaults
PCI Delay Transaction
The chipset has an embedded 32-bit posted write buffer to support delay transactions cycles.
Select Enabled to support compliance with PCI specification version 2.1. The settings are:
Enabled and Disabled.

VIA Technologies P4M890 Specifications

General

Brand	VIA Technologies
Model	P4M890
Category	Motherboard
Language	English