Alto Hardware Manual Section
3:
Emulator
17
Currently, only a small number
of
the available s-group instructions have been implemented.
The
remaining unimplemented instructions all trap in
one
of
two ways:
ROM
trap
PC
is saved in location
TRAPPC,
and then a
JMP@
TRAPVEC+OP
instruction
is
simulated.
OP
is
bits
3-7
of
the trapping instruction.
TRAPPC
527B
TRAPVEC
530B-567B
When an unimplemented opcode
is
executed by the emulator,
the
PC
is
saved here.
It
points to
the
location after
the
trapping instruction.
Contains pointers to the trap routines for
the
32
opcodes (bits
3-7 of· the . trapping instruction). The first word corresponds
to opcode
6Oxxx,
O<xxx<377B.
RAM
trap
If
no microinstruction
RAM
is
present, the trap
is
handled
as
a
ROM
trap.
If
a
RAM
is
present, the microcode transfers to location
TRAPl
in the
RAM
with the trapping instruction
in
L, the instruction cycled by 8 bits
in
the R-register
XREG,
and
PC
pointing to
the
location after the trapping instruction.
This arrangement makes it convenient to extend the Alto's standard instruction
set
by implementing
additional functions in software which
is
dispatched to via
TRAPVEC,
or in microcode which
is
dispatched
to
via a
RAM
trap. An appendix tabulates the s-group instruction set opcodes and what each does
or
how
it traps.
MUL
DIV
CYCLE
JSRII
JSRlS
61020B
Unsigned multiply:
Multiply the unsigned integers in
Ac1
and Ac2 to generate-a- 32-bit product;
add
the product
to
the integer in
ACO.
Leave the high-order part
of
the result in
ACO
and
the low-order
part
in
ACl.
Ac2
is
unaffected.
61021B
Unsigned divide:
The double-length unsigned integer in
ACO
and
Ac1
is
divided by the unsigned integer
in
Ac2.
The quotient
is
left in
Ac1;
the remainder in
ACO.
Ac2
is
unaffected. The instruction normally
skips the next instruction;
if
overflow occurs
(ACO
>
Ac2
unsigned),
DIV
does
not
skip.
60000B
Left cycle
ACO:
Left cycle (rotate) the contents
of
ACO
by the amount specified
in
instruction bits 12-15, unless
this value
is
zero, in which case cycle
ACO
left by the amount specified
in
bits 12-15
of
Acl.
64400B
Jump to subroutine double indirect,
PC
relative:
AC3+-PC+l
PC+-
rv(rv(pc+ SignExtend(DIsP»)
65000B
Jump to subroutine double indirect,
AC2
relative:
AC3+-PC+l
PC+-rv(rv(AC2+
SignExtend(DISP»)
To Next Page
Loading...