Xilinx ML605 User Manual

18 www.xilinx.com ML605 Hardware User Guide
UG534 (v1.2.1) January 21, 2010
Chapter 1: ML605 Evaluation Board
E24 DDR3_D54 174 DQ54
G25 DDR3_D55 176 DQ55
F28 DDR3_D56 181 DQ56
B31 DDR3_D57 183 DQ57
H29 DDR3_D58 191 DQ58
H28 DDR3_D59 193 DQ59
B30 DDR3_D60 180 DQ60
A30 DDR3_D61 182 DQ61
E29 DDR3_D62 192 DQ62
F29 DDR3_D63 194 DQ63
E11 DDR3_DM0 11 DM0
B11 DDR3_DM1 28 DM1
E14 DDR3_DM2 46 DM2
D19 DDR3_DM3 63 DM3
B22 DDR3_DM4 136 DM4
A26 DDR3_DM5 153 DM5
A29 DDR3_DM6 170 DM6
A31 DDR3_DM7 187 DM7
E12 DDR3_DQS0_N 10 DQS0_N
D12 DDR3_DQS0_P 12 DQS0_P
J12 DDR3_DQS1_N 27 DQS1_N
H12 DDR3_DQS1_P 29 DQS1_P
A14 DDR3_DQS2_N 45 DQS2_N
A13 DDR3_DQS2_P 47 DQS2_P
H20 DDR3_DQS3_N 62 DQS3_N
H19 DDR3_DQS3_P 64 DQS3_P
C23 DDR3_DQS4_N 135 DQS4_N
B23 DDR3_DQS4_P 137 DQS4_P
A25 DDR3_DQS5_N 152 DQS5_N
B25 DDR3_DQS5_P 154 DQS5_P
G28 DDR3_DQS6_N 169 DQS6_N
H27 DDR3_DQS6_P 171 DQS6_P
D30 DDR3_DQS7_N 186 DQS7_N
Table 1-4: DDR3 SODIMM Connections (Cont’d)
U1 FPGA Pin Schematic Net Name
J1 SODIMM
Pin Number Pin Name

Xilinx ML605 Specifications

General

Brand	Xilinx
Model	ML605
Category	Motherboard
Language	English