Xilinx ML605 User Manual

82 www.xilinx.com ML605 Hardware User Guide
UG534 (v1.2.1) January 21, 2010
Appendix C: ML605 Master UCF
NET "FLASH_A21" LOC = "AF9"; ## 10 on U4, A8 on U27
NET "FLASH_A22" LOC = "AL9"; ## 9 on U4, G1 on U27
NET "FLASH_A23" LOC = "AA23"; ## 26 on U4
NET "FLASH_D0" LOC = "AF24"; ## 34 on U4 (thru series R215 100 ohm), F2 on U27
NET "FLASH_D1" LOC = "AF25"; ## 36 on U4 (thru series R216 100 ohm), E2 on U27
NET "FLASH_D2" LOC = "W24"; ## 39 on U4 (thru series R217 100 ohm), G3 on U27
NET "FLASH_D3" LOC = "V24"; ## 41 on U4 (thru series R218 100 ohm), E4 on U27
NET "FLASH_D4" LOC = "H24"; ## 47 on U4 (thru series R219 100 ohm), E5 on U27
NET "FLASH_D5" LOC = "H25"; ## 49 on U4 (thru series R220 100 ohm), G5 on U27
NET "FLASH_D6" LOC = "P24"; ## 51 on U4 (thru series R221 100 ohm), G6 on U27
NET "FLASH_D7" LOC = "R24"; ## 53 on U4 (thru series R222 100 ohm), H7 on U27
NET "FLASH_D8" LOC = "G23"; ## 35 on U4 (thru series R223 100 ohm), E1 on U27
NET "FLASH_D9" LOC = "H23"; ## 37 on U4 (thru series R224 100 ohm), E3 on U27
NET "FLASH_D10" LOC = "N24"; ## 40 on U4 (thru series R225 100 ohm), F3 on U27
NET "FLASH_D11" LOC = "N23"; ## 42 on U4 (thru series R226 100 ohm), F4 on U27
NET "FLASH_D12" LOC = "F23"; ## 48 on U4 (thru series R227 100 ohm), F5 on U27
NET "FLASH_D13" LOC = "F24"; ## 50 on U4 (thru series R228 100 ohm), H5 on U27
NET "FLASH_D14" LOC = "L24"; ## 52 on U4 (thru series R229 100 ohm), G7 on U27
NET "FLASH_D15" LOC = "M23"; ## 54 on U4 (thru series R230 100 ohm), E7 on U27
NET "FLASH_WAIT" LOC = "J26"; ## 56 on U4
NET "FPGA_FWE_B" LOC = "AF23"; ## 14 on U4, G8 on U27
NET "FPGA_FOE_B" LOC = "AA24"; ## 32 on U4, F8 on U27
NET "FPGA_CCLK" LOC = "K8"; ## F1 on U27
NET "PLATFLASH_L_B" LOC = "AC23"; ## H1 on U27
NET "FPGA_FCS_B" LOC = "Y24"; ## 30 on U4, B4 on U27 (U10 and switch S2.2 setting
## select either U4 or U27)
##
NET "FMC_HPC_CLK0_M2C_N" LOC = "K23"; ## H5 on J64
NET "FMC_HPC_CLK0_M2C_P" LOC = "K24"; ## H4 on J64
NET "FMC_HPC_CLK1_M2C_N" LOC = "AP21"; ## G3 on J64
NET "FMC_HPC_CLK1_M2C_P" LOC = "AP20"; ## G2 on J64
NET "FMC_HPC_CLK2_M2C_IO_N" LOC = "AC30"; ## 15 on U83
NET "FMC_HPC_CLK2_M2C_IO_P" LOC = "AD30"; ## 16 on U83
NET "FMC_HPC_CLK2_M2C_MGT_C_N" LOC = "AB5"; ## 2 on series C399 0.1uF
NET "FMC_HPC_CLK2_M2C_MGT_C_P" LOC = "AB6"; ## 2 on series C398 0.1uF
NET "FMC_HPC_CLK3_M2C_IO_N" LOC = "AF34"; ## J3 on J64
NET "FMC_HPC_CLK3_M2C_IO_P" LOC = "AE34"; ## J2 on J64
NET "FMC_HPC_CLK3_M2C_MGT_C_N" LOC = "AH5"; ## 2 on series C397 0.1uF
NET "FMC_HPC_CLK3_M2C_MGT_C_P" LOC = "AH6"; ## 2 on series C396 0.1uF
NET "FMC_HPC_DP0_C2M_N" LOC = "AB2"; ## C3 on J64
NET "FMC_HPC_DP0_C2M_P" LOC = "AB1"; ## C2 on J64
NET "FMC_HPC_DP0_M2C_N" LOC = "AC4"; ## C7 on J64
NET "FMC_HPC_DP0_M2C_P" LOC = "AC3"; ## C6 on J64
NET "FMC_HPC_DP1_C2M_N" LOC = "AD2"; ## A23 on J64
NET "FMC_HPC_DP1_C2M_P" LOC = "AD1"; ## A22 on J64
NET "FMC_HPC_DP1_M2C_N" LOC = "AE4"; ## A3 on J64
NET "FMC_HPC_DP1_M2C_P" LOC = "AE3"; ## A2 on J64
NET "FMC_HPC_DP2_C2M_N" LOC = "AF2"; ## A27 on J64
NET "FMC_HPC_DP2_C2M_P" LOC = "AF1"; ## A26 on J64
NET "FMC_HPC_DP2_M2C_N" LOC = "AF6"; ## A7 on J64
NET "FMC_HPC_DP2_M2C_P" LOC = "AF5"; ## A6 on J64
NET "FMC_HPC_DP3_C2M_N" LOC = "AH2"; ## A31 on J64
NET "FMC_HPC_DP3_C2M_P" LOC = "AH1"; ## A30 on J64
NET "FMC_HPC_DP3_M2C_N" LOC = "AG4"; ## A11 on J64
NET "FMC_HPC_DP3_M2C_P" LOC = "AG3"; ## A10 on J64
NET "FMC_HPC_DP4_C2M_N" LOC = "AK2"; ## A35 on J64
NET "FMC_HPC_DP4_C2M_P" LOC = "AK1"; ## A34 on J64
NET "FMC_HPC_DP4_M2C_N" LOC = "AJ4"; ## A15 on J64
NET "FMC_HPC_DP4_M2C_P" LOC = "AJ3"; ## A14 on J64
NET "FMC_HPC_DP5_C2M_N" LOC = "AM2"; ## A39 on J64
NET "FMC_HPC_DP5_C2M_P" LOC = "AM1"; ## A38 on J64
NET "FMC_HPC_DP5_M2C_N" LOC = "AL4"; ## A19 on J64
NET "FMC_HPC_DP5_M2C_P" LOC = "AL3"; ## A18 on J64
NET "FMC_HPC_DP6_C2M_N" LOC = "AN4"; ## B37 on J64
NET "FMC_HPC_DP6_C2M_P" LOC = "AN3"; ## B36 on J64

Xilinx ML605 Specifications

General

Brand	Xilinx
Model	ML605
Category	Motherboard
Language	English