Xilinx Virtex-7 FPGA VC7203 Characterization Kit IBERT - Page 36

36 www.xilinx.com VC7203 IBERT Getting Started Guide
UG847 (v4.0) November 6, 2013
Chapter 1: VC7203 IBERT Getting Started Guide
13. In the Sources window, Design Sources should now reflect that the SuperClock-2
module is part of the example IBERT design (Figure 1-30).
14. Click Run Synthesis in the Flow Navigator, which synthesizes the design.
X-Ref Target - Figure 1-30
Figure 1-30: Design Sources File Hierarchy
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